mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
fix(dma): fix dma alignment when flash_enc enabled
Closes https://github.com/espressif/esp-idf/issues/17708
This commit is contained in:
@@ -16,6 +16,8 @@
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#include "freertos/semphr.h"
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#include "ccomp_timer.h"
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#include "esp_async_memcpy.h"
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#include "hal/efuse_hal.h"
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#if SOC_GDMA_SUPPORTED
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#include "hal/gdma_ll.h"
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#endif
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@@ -148,17 +150,19 @@ static bool test_async_memcpy_cb_v1(async_memcpy_handle_t mcp_hdl, async_memcpy_
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static void test_memory_copy_blocking(async_memcpy_handle_t driver)
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{
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SemaphoreHandle_t sem = xSemaphoreCreateBinary();
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const uint32_t test_buffer_size[] = {256, 512, 1024, 2048, 4096, 5012};
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const uint32_t test_buffer_size[] = {256, 512, 1024, 2048, 4096, 5008};
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memcpy_testbench_context_t test_context = {
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.align = 4,
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.align = 16,
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};
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for (int i = 0; i < sizeof(test_buffer_size) / sizeof(test_buffer_size[0]); i++) {
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// Test different align edge
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for (int off = 0; off < 4; off++) {
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test_context.buffer_size = test_buffer_size[i];
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test_context.seed = i;
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test_context.src_offset = off;
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test_context.dst_offset = off;
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if (!efuse_hal_flash_encryption_enabled()) {
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test_context.src_offset = off;
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test_context.dst_offset = off;
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}
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async_memcpy_setup_testbench(&test_context);
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TEST_ESP_OK(esp_async_memcpy(driver, test_context.to_addr, test_context.from_addr, test_context.copy_size, test_async_memcpy_cb_v1, sem));
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@@ -235,6 +239,9 @@ TEST_CASE("memory copy with dest address unaligned", "[async mcp]")
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};
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[[maybe_unused]] async_memcpy_handle_t driver = NULL;
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if (efuse_hal_flash_encryption_enabled()) {
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TEST_PASS_MESSAGE("Flash encryption is enabled, skip this test");
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}
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#if SOC_CP_DMA_SUPPORTED
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printf("Testing memcpy by CP DMA\r\n");
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@@ -11,6 +11,7 @@
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#include "unity.h"
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#include "esp_private/dw_gdma.h"
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#include "hal/dw_gdma_ll.h"
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#include "hal/efuse_hal.h"
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#include "esp_cache.h"
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#include "esp_private/esp_cache_private.h"
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@@ -540,6 +541,9 @@ TEST_CASE("DW_GDMA M2M Test: memory set with fixed address", "[DW_GDMA]")
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size_t int_mem_alignment = 0;
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TEST_ESP_OK(esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &ext_mem_alignment));
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TEST_ESP_OK(esp_cache_get_alignment(0, &int_mem_alignment));
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if (efuse_hal_flash_encryption_enabled()) {
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TEST_PASS_MESSAGE("Flash encryption is enabled, skip this test");
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}
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uint8_t *src_buf = heap_caps_aligned_calloc(ext_mem_alignment, 1, 256, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT);
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uint8_t *dst_buf = heap_caps_aligned_calloc(int_mem_alignment, 1, 256, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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TEST_ASSERT_NOT_NULL(src_buf);
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@@ -20,6 +20,7 @@
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#include "hal/gdma_ll.h"
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#include "hal/cache_ll.h"
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#include "hal/cache_hal.h"
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#include "hal/efuse_hal.h"
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#include "esp_cache.h"
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#include "esp_memory_utils.h"
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#include "gdma_test_utils.h"
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@@ -173,7 +174,8 @@ TEST_CASE("GDMA channel allocation", "[GDMA]")
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}
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static void test_gdma_config_link_list(gdma_channel_handle_t tx_chan, gdma_channel_handle_t rx_chan,
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gdma_link_list_handle_t *tx_link_list, gdma_link_list_handle_t *rx_link_list, bool dma_link_in_ext_mem)
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gdma_link_list_handle_t *tx_link_list, gdma_link_list_handle_t *rx_link_list,
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size_t burst_size, bool dma_link_in_ext_mem)
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{
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gdma_strategy_config_t strategy = {
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@@ -183,6 +185,15 @@ static void test_gdma_config_link_list(gdma_channel_handle_t tx_chan, gdma_chann
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TEST_ESP_OK(gdma_apply_strategy(tx_chan, &strategy));
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TEST_ESP_OK(gdma_apply_strategy(rx_chan, &strategy));
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gdma_transfer_config_t transfer_cfg = {
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.max_data_burst_size = burst_size,
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#if SOC_DMA_CAN_ACCESS_FLASH
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.access_ext_mem = true,
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#endif
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};
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TEST_ESP_OK(gdma_config_transfer(tx_chan, &transfer_cfg));
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TEST_ESP_OK(gdma_config_transfer(rx_chan, &transfer_cfg));
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gdma_trigger_t m2m_trigger = GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_M2M, 0);
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// get a free DMA trigger ID for memory copy
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uint32_t free_m2m_id_mask = 0;
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@@ -231,16 +242,24 @@ static void test_gdma_m2m_transaction(gdma_channel_handle_t tx_chan, gdma_channe
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TEST_ASSERT_NOT_NULL(done_sem);
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TEST_ESP_OK(gdma_register_rx_event_callbacks(rx_chan, &rx_cbs, done_sem));
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if (efuse_hal_flash_encryption_enabled()) {
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dma_link_in_ext_mem = false;
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}
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gdma_link_list_handle_t tx_link_list = NULL;
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gdma_link_list_handle_t rx_link_list = NULL;
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test_gdma_config_link_list(tx_chan, rx_chan, &tx_link_list, &rx_link_list, dma_link_in_ext_mem);
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test_gdma_config_link_list(tx_chan, rx_chan, &tx_link_list, &rx_link_list, 16, dma_link_in_ext_mem);
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size_t int_mem_alignment = 0;
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size_t ext_mem_alignment = 0;
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TEST_ESP_OK(gdma_get_alignment_constraints(tx_chan, &int_mem_alignment, &ext_mem_alignment));
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// allocate the source buffer from SRAM
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uint8_t *src_data = heap_caps_calloc(1, 128, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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uint8_t *src_data = heap_caps_aligned_calloc(int_mem_alignment, 1, 128, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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TEST_ASSERT_NOT_NULL(src_data);
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// allocate the destination buffer from SRAM
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uint8_t *dst_data = heap_caps_calloc(1, 256, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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uint8_t *dst_data = heap_caps_aligned_calloc(int_mem_alignment, 1, 256, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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TEST_ASSERT_NOT_NULL(dst_data);
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// prepare the source data
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@@ -253,7 +272,7 @@ static void test_gdma_m2m_transaction(gdma_channel_handle_t tx_chan, gdma_channe
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}
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// test DMA can read data from main flash
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#if SOC_DMA_CAN_ACCESS_FLASH
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const char *src_string = "GDMA can read data from MSPI Flash";
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static const char src_string[] __attribute__((aligned(GDMA_LL_GET(ACCESS_ENCRYPTION_MEM_ALIGNMENT)))) = "GDMA can read MSPI Flash data!!!";
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size_t src_string_len = strlen(src_string);
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TEST_ASSERT_TRUE(esp_ptr_in_drom(src_string));
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@@ -268,12 +287,12 @@ static void test_gdma_m2m_transaction(gdma_channel_handle_t tx_chan, gdma_channe
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gdma_buffer_mount_config_t tx_buf_mount_config[] = {
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[0] = {
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.buffer = src_data,
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.buffer_alignment = 1,
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.buffer_alignment = int_mem_alignment,
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.length = 64,
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},
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[1] = {
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.buffer = src_data + 64,
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.buffer_alignment = 1,
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.buffer_alignment = int_mem_alignment,
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.length = 64,
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#if !SOC_DMA_CAN_ACCESS_FLASH
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.flags = {
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@@ -285,7 +304,7 @@ static void test_gdma_m2m_transaction(gdma_channel_handle_t tx_chan, gdma_channe
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#if SOC_DMA_CAN_ACCESS_FLASH
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[2] = {
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.buffer = (void *)src_string,
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.buffer_alignment = 1,
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.buffer_alignment = ext_mem_alignment,
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.length = src_string_len,
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.flags = {
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.mark_eof = true,
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@@ -412,6 +431,8 @@ static void test_gdma_m2m_unaligned_buffer_test(uint8_t *dst_data, uint8_t *src_
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{
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TEST_ASSERT_NOT_NULL(src_data);
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TEST_ASSERT_NOT_NULL(dst_data);
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memset(src_data, 0, data_length + offset_len);
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memset(dst_data, 0, data_length + offset_len);
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gdma_channel_handle_t tx_chan = NULL;
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gdma_channel_handle_t rx_chan = NULL;
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gdma_channel_alloc_config_t tx_chan_alloc_config = {};
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@@ -430,7 +451,10 @@ static void test_gdma_m2m_unaligned_buffer_test(uint8_t *dst_data, uint8_t *src_
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gdma_link_list_handle_t tx_link_list = NULL;
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gdma_link_list_handle_t rx_link_list = NULL;
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test_gdma_config_link_list(tx_chan, rx_chan, &tx_link_list, &rx_link_list, false);
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test_gdma_config_link_list(tx_chan, rx_chan, &tx_link_list, &rx_link_list, 0, false);
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size_t rx_mem_alignment = 0;
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TEST_ESP_OK(gdma_get_alignment_constraints(rx_chan, &rx_mem_alignment, NULL));
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// prepare the source data
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for (int i = 0; i < data_length; i++) {
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@@ -460,7 +484,7 @@ static void test_gdma_m2m_unaligned_buffer_test(uint8_t *dst_data, uint8_t *src_
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TEST_ESP_OK(esp_dma_split_rx_buffer_to_cache_aligned(dst_data + offset_len, data_length, &align_array, &stash_buffer));
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for (int i = 0; i < 3; i++) {
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rx_aligned_buf_mount_config[i].buffer = align_array.aligned_buffer[i].aligned_buffer;
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rx_aligned_buf_mount_config[i].buffer_alignment = sram_alignment;
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rx_aligned_buf_mount_config[i].buffer_alignment = MAX(sram_alignment, rx_mem_alignment);
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rx_aligned_buf_mount_config[i].length = align_array.aligned_buffer[i].length;
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}
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TEST_ESP_OK(gdma_link_mount_buffers(rx_link_list, 0, rx_aligned_buf_mount_config, 3, NULL));
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@@ -496,6 +520,10 @@ static void test_gdma_m2m_unaligned_buffer_test(uint8_t *dst_data, uint8_t *src_
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TEST_CASE("GDMA M2M Unaligned RX Buffer Test", "[GDMA][M2M]")
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{
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if (efuse_hal_flash_encryption_enabled()) {
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TEST_PASS_MESSAGE("Flash encryption is enabled, skip this test");
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}
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uint8_t *sbuf = heap_caps_aligned_calloc(64, 1, 10240, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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uint8_t *dbuf = heap_caps_aligned_calloc(64, 1, 10240, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -17,6 +17,7 @@
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#include "soc/soc_caps.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "hal/gdma_ll.h"
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#include "esp_cache.h"
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typedef struct {
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@@ -32,37 +33,47 @@ static test_crc_case_t crc_test_cases[] = {
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.crc_bit_width = 8,
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.init_value = 0x00,
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.poly_hex = 0x07,
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.expected_result = 0xC6,
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.expected_result = 0xB8,
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},
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[1] = {
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.crc_bit_width = 8,
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.init_value = 0x00,
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.poly_hex = 0x07,
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.reverse_data_mask = true, // refin = true
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.expected_result = 0xDE,
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.expected_result = 0xF0,
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},
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// CRC16, x^16+x^12+x^5+1
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[2] = {
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.crc_bit_width = 16,
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.init_value = 0xFFFF,
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.poly_hex = 0x1021,
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.expected_result = 0x5289,
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.expected_result = 0xA9B2,
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},
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// CRC32, x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x+1
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[3] = {
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.crc_bit_width = 32,
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.init_value = 0xFFFFFFFF,
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.poly_hex = 0x04C11DB7,
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.expected_result = 0x63B3E283,
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.expected_result = 0x692F6C7E,
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}
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};
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// CRC online: https://www.lddgo.net/en/encrypt/crc
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static void test_gdma_crc_calculation(gdma_channel_handle_t tx_chan, int test_num_crc_algorithm)
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{
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// Note, burst size should be at least 16 when accessing encrypted external memory
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gdma_transfer_config_t transfer_cfg = {
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.max_data_burst_size = 16,
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.access_ext_mem = true,
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};
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TEST_ESP_OK(gdma_config_transfer(tx_chan, &transfer_cfg));
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uint32_t crc_result = 0;
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const char *test_input_string = "Share::Connect::Innovate";
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static const char test_input_string[] __attribute__((aligned(GDMA_LL_GET(ACCESS_ENCRYPTION_MEM_ALIGNMENT)))) = "GDMACRC Share::Connect::Innovate";
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size_t input_data_size = strlen(test_input_string);
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TEST_ASSERT_EQUAL((uintptr_t)test_input_string % GDMA_LL_GET(ACCESS_ENCRYPTION_MEM_ALIGNMENT), 0);
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// this test case also test the GDMA can fetch data from MSPI Flash
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TEST_ASSERT_TRUE(esp_ptr_in_drom(test_input_string));
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printf("Calculate CRC value for string: \"%s\"\r\n", test_input_string);
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@@ -33,3 +33,29 @@ def test_dma(dut: Dut) -> None:
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@idf_parametrize('target', ['esp32s3'], indirect=['target'])
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def test_dma_psram(dut: Dut) -> None:
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dut.run_all_single_board_cases(reset=True)
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@pytest.mark.flash_encryption
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@pytest.mark.parametrize(
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'config',
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[
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'ext_mem_encryption',
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],
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indirect=True,
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)
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@idf_parametrize('target', ['esp32p4', 'esp32c5'], indirect=['target'])
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def test_dma_ext_mem_encryption(dut: Dut) -> None:
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dut.run_all_single_board_cases(reset=True)
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@pytest.mark.flash_encryption_f4r8
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@pytest.mark.parametrize(
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'config',
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[
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'ext_mem_encryption',
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],
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indirect=True,
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)
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@idf_parametrize('target', ['esp32s3'], indirect=['target'])
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def test_dma_ext_mem_encryption_s3_f4r8(dut: Dut) -> None:
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dut.run_all_single_board_cases(reset=True)
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@@ -0,0 +1,9 @@
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CONFIG_PARTITION_TABLE_OFFSET=0x9000
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CONFIG_SECURE_FLASH_ENC_ENABLED=y
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CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=y
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CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=y
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CONFIG_SECURE_BOOT_ALLOW_JTAG=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=y
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CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED=y
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