mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
feat(esp_driver_dma): add dw_gdma backend for async_memcpy
This commit is contained in:
morris
@@ -67,7 +67,7 @@ typedef struct {
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.flags = 0, \
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}
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#if SOC_HAS(AHB_GDMA)
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#if SOC_AHB_GDMA_SUPPORTED
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/**
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* @brief Install async memcpy driver, with AHB-GDMA as the backend
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*
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@@ -80,9 +80,9 @@ typedef struct {
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* - ESP_FAIL: Install async memcpy driver failed because of other error
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*/
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esp_err_t esp_async_memcpy_install_gdma_ahb(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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#endif // SOC_HAS(AHB_GDMA)
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#endif // SOC_AHB_GDMA_SUPPORTED
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#if SOC_HAS(AXI_GDMA)
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#if SOC_AXI_GDMA_SUPPORTED
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/**
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* @brief Install async memcpy driver, with AXI-GDMA as the backend
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*
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@@ -95,9 +95,9 @@ esp_err_t esp_async_memcpy_install_gdma_ahb(const async_memcpy_config_t *config,
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* - ESP_FAIL: Install async memcpy driver failed because of other error
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*/
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esp_err_t esp_async_memcpy_install_gdma_axi(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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#endif // SOC_HAS(AXI_GDMA)
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#endif // SOC_AXI_GDMA_SUPPORTED
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#if SOC_HAS(LP_AHB_GDMA)
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#if SOC_LP_AHB_GDMA_SUPPORTED
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/**
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* @brief Install async memcpy driver, with LP AHB-GDMA as the backend
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*
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@@ -110,7 +110,7 @@ esp_err_t esp_async_memcpy_install_gdma_axi(const async_memcpy_config_t *config,
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* - ESP_FAIL: Install async memcpy driver failed because of other error
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*/
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esp_err_t esp_async_memcpy_install_gdma_lp_ahb(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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#endif // SOC_HAS(LP_AHB_GDMA)
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#endif // SOC_LP_AHB_GDMA_SUPPORTED
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#if SOC_CP_DMA_SUPPORTED
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/**
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@@ -129,6 +129,22 @@ esp_err_t esp_async_memcpy_install_gdma_lp_ahb(const async_memcpy_config_t *conf
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esp_err_t esp_async_memcpy_install_cpdma(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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#endif // SOC_CP_DMA_SUPPORTED
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#if SOC_DW_GDMA_SUPPORTED
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/**
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* @brief Install async memcpy driver, with DW_GDMA as the backend
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*
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* @param[in] config Configuration of async memcpy
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* @param[out] mcp Returned driver handle
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* @return
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* - ESP_OK: Install async memcpy driver successfully
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* - ESP_ERR_INVALID_ARG: Install async memcpy driver failed because of invalid argument
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* - ESP_ERR_NO_MEM: Install async memcpy driver failed because out of memory
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* - ESP_FAIL: Install async memcpy driver failed because of other error
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*/
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esp_err_t esp_async_memcpy_install_dw_gdma(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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#endif // SOC_DW_GDMA_SUPPORTED
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/** @cond */
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/**
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* @brief Install async memcpy driver with the default DMA backend
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*
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@@ -143,12 +159,14 @@ esp_err_t esp_async_memcpy_install_cpdma(const async_memcpy_config_t *config, as
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* - ESP_ERR_NO_MEM: Install async memcpy driver failed because out of memory
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* - ESP_FAIL: Install async memcpy driver failed because of other error
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*/
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esp_err_t esp_async_memcpy_install(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp);
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esp_err_t esp_async_memcpy_install(const async_memcpy_config_t *config, async_memcpy_handle_t *mcp)
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__attribute__((deprecated("Select a DMA backend explicitly with esp_async_memcpy_install_* instead")));
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/** @endcond */
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/**
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* @brief Uninstall async memcpy driver
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*
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* @param[in] mcp Handle of async memcpy driver that returned from `esp_async_memcpy_install`
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* @param[in] mcp Handle of async memcpy driver returned by an install function
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* @return
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* - ESP_OK: Uninstall async memcpy driver successfully
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* - ESP_ERR_INVALID_ARG: Uninstall async memcpy driver failed because of invalid argument
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@@ -161,7 +179,7 @@ esp_err_t esp_async_memcpy_uninstall(async_memcpy_handle_t mcp);
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*
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* @note The callback function is invoked in interrupt context, never do blocking jobs in the callback.
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*
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* @param[in] mcp Handle of async memcpy driver that returned from `esp_async_memcpy_install`
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* @param[in] mcp Handle of async memcpy driver returned by an install function
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* @param[in] dst Destination address (copy to)
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* @param[in] src Source address (copy from)
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* @param[in] n Number of bytes to copy
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@@ -180,7 +198,7 @@ esp_err_t esp_async_memcpy(async_memcpy_handle_t mcp, void *dst, void *src, size
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* @note This function is blocking and should not be called from interrupt context.
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* @note Only `timeout_ms=-1` is supported, which means waiting indefinitely.
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*
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* @param[in] mcp Handle of async memcpy driver that returned from `esp_async_memcpy_install`
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* @param[in] mcp Handle of async memcpy driver returned by an install function
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* @param[in] dst Destination address (copy to)
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* @param[in] src Source address (copy from)
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* @param[in] n Number of bytes to copy
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@@ -206,7 +224,7 @@ typedef enum {
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*
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* @note The created ETM event object can be deleted later by calling `esp_etm_del_event`
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*
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* @param[in] mcp Handle of async memcpy driver that returned from `esp_async_memcpy_install`
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* @param[in] mcp Handle of async memcpy driver returned by an install function
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* @param[in] event_type ETM event type
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* @param[out] out_event Returned ETM event handle
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* @return
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@@ -100,11 +100,46 @@ esp_err_t dw_gdma_channel_get_id(dw_gdma_channel_handle_t chan, int *channel_id)
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* @note By dynamic, we mean these channel end configurations can be changed in each transfer.
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*/
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typedef struct {
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uint32_t addr; /*!< Memory address */
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dw_gdma_transfer_width_t width; /*!< Transfer width */
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dw_gdma_burst_mode_t burst_mode; /*!< Burst mode */
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dw_gdma_burst_items_t burst_items; /*!< Number of data items that are contained in one burst transaction */
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uint8_t burst_len; /*!< Burst transaction length, if set to 0, the hardware will apply a possible value as burst length */
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uint32_t addr; /*!< Memory address */
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/**
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* @brief Transfer width, i.e. the bit width of a single data item (a "beat").
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*
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* This is the atomic unit of transfer. It decides how many bytes are moved per data item,
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* and therefore the granularity of both `burst_size` / `axi_burst_len` and the address step when
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* `addr_inc_mode` is INCREMENT. E.g. with `DW_GDMA_TRANS_WIDTH_32`, one item is 4 bytes.
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*/
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dw_gdma_transfer_width_t width;
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/**
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* @brief Address increment mode: whether the transfer address advances after each data item.
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*
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* @note It controls the address behaviour item by item:
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* - `DW_GDMA_ADDR_INC_MODE_INCREMENT`: address is increased by `width` after each item
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* (normal reading/writing of a contiguous buffer).
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* - `DW_GDMA_ADDR_INC_MODE_FIXED` : address stays the same after each item
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* (used when the target is a FIFO / peripheral register, e.g. DSI/CSI/ISP).
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*/
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dw_gdma_addr_inc_mode_t addr_inc_mode;
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/**
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* @brief Burst size: number of data items contained in one (core-level) burst transaction.
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*
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* This is the "burst size" (the DW_GDMA `MSIZE` field): how many `width`-sized items the DMA
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* engine requests in a single burst. It sets the granularity of the transfer and is typically a
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* power of two (1, 4, 8, ...). The total bytes of one such burst is `burst_size * width`.
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*
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* @note To tell it apart from `axi_burst_len`: `burst_size` is the coarse, power-of-two size of
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* a burst as configured by the DMA core, while `axi_burst_len` is the fine-grained AXI
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* burst length. For most cases keep them consistent (e.g. both 4/8/16), but you may set
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* `axi_burst_len` to a value that is not a power of two and let `burst_size` stay coarse.
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*/
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dw_gdma_burst_size_t burst_size;
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/**
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* @brief AXI burst transaction length, in number of data items (beats).
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*
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* This directly programs the AXI `arlen`/`awlen` fields, i.e. how many beats the AXI master
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* puts into a single AXI burst. The total bytes transferred in one burst is `axi_burst_len * width`.
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* If set to 0, the hardware chooses a possible value for the burst length.
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*/
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uint8_t axi_burst_len;
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struct {
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uint32_t en_status_write_back: 1; /*!< Enable peripheral status write back */
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} flags;
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@@ -116,7 +151,13 @@ typedef struct {
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typedef struct {
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dw_gdma_channel_dynamic_config_t src; /*!< source configuration */
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dw_gdma_channel_dynamic_config_t dst; /*!< destination configuration */
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size_t size; /*!< Transfer size */
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/**
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* @brief Transfer size, in number of data items
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*
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* The size in bytes is `size * width` (each data item is `width` bytes). For a
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* Link-List transfer, this is the block transfer size of the corresponding LLI.
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*/
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size_t size;
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} dw_gdma_block_transfer_config_t;
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/**
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