diff --git a/components/esp_driver_isp/src/isp_core.c b/components/esp_driver_isp/src/isp_core.c
index 8c75ea334f3..d397f944d47 100644
--- a/components/esp_driver_isp/src/isp_core.c
+++ b/components/esp_driver_isp/src/isp_core.c
@@ -116,12 +116,13 @@ esp_err_t esp_isp_new_processor(const esp_isp_processor_cfg_t *proc_config, isp_
     if (out_clk_freq_hz != proc_config->clk_hz) {
         ESP_LOGW(TAG, "precision loss, real output frequency: %"PRIu32"Hz", out_clk_freq_hz);
     }
-    isp_hal_init(&proc->hal, proc->proc_id);
     ESP_GOTO_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), err, TAG, "clock source enable failed");
     PERIPH_RCC_ATOMIC() {
         isp_ll_select_clk_source(proc->hal.hw, clk_src);
         isp_ll_set_clock_div(proc->hal.hw, &clk_div);
     }
+    isp_hal_init(&proc->hal, proc->proc_id);
+
     proc->clk_src = clk_src;
     atomic_init(&proc->isp_fsm, ISP_FSM_INIT);
     atomic_init(&proc->bf_fsm, ISP_FSM_INIT);
diff --git a/components/esp_hal_cam/esp32p4/include/hal/isp_ll.h b/components/esp_hal_cam/esp32p4/include/hal/isp_ll.h
index af73272f5a5..226b67e50ab 100644
--- a/components/esp_hal_cam/esp32p4/include/hal/isp_ll.h
+++ b/components/esp_hal_cam/esp32p4/include/hal/isp_ll.h
@@ -306,10 +306,10 @@ static inline void isp_ll_select_clk_source(isp_dev_t *hw, soc_periph_isp_clk_sr
     case ISP_CLK_SRC_XTAL:
         clk_val = 0;
         break;
-    case ISP_CLK_SRC_PLL160:
+    case ISP_CLK_SRC_PLL240:
         clk_val = 1;
         break;
-    case ISP_CLK_SRC_PLL240:
+    case ISP_CLK_SRC_PLL160:
         clk_val = 2;
         break;
     default:
diff --git a/components/soc/esp32p4/include/soc/clk_tree_defs.h b/components/soc/esp32p4/include/soc/clk_tree_defs.h
index 76bac33b194..eb571f4a13e 100644
--- a/components/soc/esp32p4/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32p4/include/soc/clk_tree_defs.h
@@ -573,7 +573,7 @@ typedef enum {
  * @brief Type of ISP clock source.
  */
 typedef enum {
-    ISP_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M,      /*!< Select SOC_MOD_CLK_PLL_F160M as ISP source clock */
+    ISP_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F240M,      /*!< Select SOC_MOD_CLK_PLL_F240M as ISP source clock */
     ISP_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,              /*!< Select SOC_MOD_CLK_XTAL as ISP source clock */
     ISP_CLK_SRC_PLL160 = SOC_MOD_CLK_PLL_F160M,       /*!< Select SOC_MOD_CLK_PLL_F160M as ISP source clock */
     ISP_CLK_SRC_PLL240 = SOC_MOD_CLK_PLL_F240M,       /*!< Select SOC_MOD_CLK_PLL_F240M as ISP source clock */
diff --git a/examples/peripherals/isp/multi_pipelines/main/isp_dsi_main.c b/examples/peripherals/isp/multi_pipelines/main/isp_dsi_main.c
index 2e234751088..cc46659d162 100644
--- a/examples/peripherals/isp/multi_pipelines/main/isp_dsi_main.c
+++ b/examples/peripherals/isp/multi_pipelines/main/isp_dsi_main.c
@@ -174,7 +174,7 @@ void app_main(void)
         .v_res = crop_v_res,
         .lane_bit_rate_mbps = EXAMPLE_MIPI_CSI_LANE_BITRATE_MBPS,
         .input_data_color_type = CAM_CTLR_COLOR_RAW8,
-        .output_data_color_type = CAM_CTLR_COLOR_RGB565,
+        .output_data_color_type = CAM_CTLR_COLOR_RAW8,
         .data_lane_num = 2,
         .byte_swap_en = false,
         .queue_items = 1,