Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-03 03:31:41 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'fix/s3_xip_opt_os_startup_v5.4' into 'release/v5.4'

Browse Source 
fix(mspi): fixed possible boot failure in some builds when psram is enabled (v5.4)

See merge request espressif/esp-idf!48585
This commit is contained in:
morris
2026-06-08 10:39:18 +08:00
parent 9b0fc47310 c8447b51e2
commit ed980bd744
4 changed files with 48 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/include/esp_private/mspi_timing_tuning.h
+15
View File
@@ -36,6 +36,21 @@ uint32_t mspi_timing_get_psram_low_speed_freq_mhz(void);
*/
void mspi_timing_enter_high_speed_mode(bool control_spi1);
/**
* @brief Switch MSPI to low speed while suspending external memory cache to avoid in-flight cache line fills across the
* clock change.
*
* @note Early init only. Not safe for general runtime use: does not coordinate with other cores or freeze cache.
*/
void mspi_timing_enter_low_speed_early(void);
/**
* @brief Switch MSPI to high speed while suspending external memory cache.
*
* @note Same usage constraints as @ref mspi_timing_enter_low_speed_early.
*/
void mspi_timing_enter_high_speed_early(void);
/**
* @brief Switch MSPI into low speed mode / high speed mode.
* @note This API is cache safe, it will freeze both D$ and I$ and restore them after MSPI is switched
components/esp_hw_support/mspi_timing_tuning.c
+27 -6
View File
@@ -15,6 +15,7 @@
#include "soc/soc.h"
#include "hal/spi_flash_hal.h"
#include "esp_private/esp_cache_private.h"
#include "esp_private/cache_utils.h"
#include "esp_private/mspi_timing_tuning.h"
#include "esp_private/mspi_timing_config.h"
#include "mspi_timing_by_mspi_delay.h"
@@ -347,9 +348,9 @@ void mspi_timing_flash_tuning(void)
{
/**
* set MSPI related regs to 20mhz configuration, to get reference data from FLASH
* see detailed comments in this function (`mspi_timing_enter_low_speed_mode`)
* see detailed comments in this function (`mspi_timing_enter_low_speed_early`)
*/
mspi_timing_enter_low_speed_mode(true);
mspi_timing_enter_low_speed_early();
#if SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY
mspi_tuning_cfg_drv_t drv = {
@@ -377,7 +378,7 @@ void mspi_timing_flash_tuning(void)
s_do_tuning(reference_data, &timing_configs, true);
mspi_timing_enter_high_speed_mode(true);
mspi_timing_enter_high_speed_early();
}
#else
void mspi_timing_flash_tuning(void)
@@ -395,9 +396,9 @@ void mspi_timing_psram_tuning(void)
{
/**
* set MSPI related regs to 20mhz configuration, to write reference data to PSRAM
* see detailed comments in this function (`mspi_timing_enter_low_speed_mode`)
* see detailed comments in this function (`mspi_timing_enter_low_speed_early`)
*/
mspi_timing_enter_low_speed_mode(true);
mspi_timing_enter_low_speed_early();
// write data into psram, used to do timing tuning test.
uint8_t reference_data[MSPI_TIMING_TEST_DATA_LEN];
@@ -460,7 +461,7 @@ void mspi_timing_psram_tuning(void)
s_do_tuning(reference_data, &timing_configs, false);
#endif
mspi_timing_enter_high_speed_mode(true);
mspi_timing_enter_high_speed_early();
}
#else
@@ -584,6 +585,26 @@ void mspi_timing_change_speed_mode_cache_safe(bool switch_down)
#endif
}
/*------------------------------------------------------------------------------
* Early-init MSPI speed switch (see mspi_timing_tuning.h)
*----------------------------------------------------------------------------*/
void mspi_timing_enter_low_speed_early(void)
{
uint32_t cache_state = 0;
spi_flash_disable_cache(0, &cache_state);
mspi_timing_enter_low_speed_mode(true);
spi_flash_restore_cache(0, cache_state);
}
void mspi_timing_enter_high_speed_early(void)
{
uint32_t cache_state = 0;
spi_flash_disable_cache(0, &cache_state);
mspi_timing_enter_high_speed_mode(true);
spi_flash_restore_cache(0, cache_state);
}
/*------------------------------------------------------------------------------
* APIs to inform SPI1 Flash driver of necessary timing configurations
*----------------------------------------------------------------------------*/