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feat(esp_tee): Enable MSPI tuning for Flash and PSRAM
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@@ -13,7 +13,9 @@
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#include "rom/digital_signature.h"
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#include "hal/mmu_types.h"
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#include "hal/wdt_hal.h"
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#include "hal/spi_flash_hal.h"
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#include "hal/spi_flash_types.h"
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#include "esp_private/mspi_timing_tuning.h"
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#include "esp_hmac.h"
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#include "esp_ds.h"
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#include "esp_crypto_lock.h"
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@@ -490,4 +492,36 @@ esp_err_t IRAM_ATTR __wrap_spi_flash_chip_generic_config_host_io_mode(esp_flash_
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{
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return esp_tee_service_call(3, SS_SPI_FLASH_CHIP_GENERIC_CONFIG_HOST_IO_MODE, chip, flags);
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}
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#if CONFIG_IDF_TARGET_ESP32C5
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void IRAM_ATTR __wrap_mspi_timing_flash_tuning(void)
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{
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esp_tee_service_call(1, SS_MSPI_TIMING_FLASH_TUNING);
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}
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void IRAM_ATTR __wrap_mspi_timing_psram_tuning(void)
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{
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esp_tee_service_call(1, SS_MSPI_TIMING_PSRAM_TUNING);
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}
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void IRAM_ATTR __wrap_mspi_timing_enter_low_speed_mode(bool control_spi1)
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{
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esp_tee_service_call(2, SS_MSPI_TIMING_ENTER_LOW_SPEED_MODE, control_spi1);
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}
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void IRAM_ATTR __wrap_mspi_timing_enter_high_speed_mode(bool control_spi1)
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{
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esp_tee_service_call(2, SS_MSPI_TIMING_ENTER_HIGH_SPEED_MODE, control_spi1);
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}
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void IRAM_ATTR __wrap_mspi_timing_change_speed_mode_cache_safe(bool switch_down)
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{
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esp_tee_service_call(2, SS_MSPI_TIMING_CHANGE_SPEED_MODE_CACHE_SAFE, switch_down);
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}
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void IRAM_ATTR __wrap_spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config)
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{
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esp_tee_service_call(2, SS_SPI_TIMING_GET_FLASH_TIMING_PARAM, out_timing_config);
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}
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#endif
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#endif
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