diff --git a/components/hal/esp32c5/include/hal/rng_ll.h b/components/hal/esp32c5/include/hal/rng_ll.h index fd3cd432fe3..43d63f54d4e 100644 --- a/components/hal/esp32c5/include/hal/rng_ll.h +++ b/components/hal/esp32c5/include/hal/rng_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,10 @@ #include "hal/lp_clkrst_ll.h" #define RNG_LL_DEPENDS_ON_LP_PERIPH 1 +//For ESP32C5, RNG needs to be reset and enabled again when wakeup from sleep +#define RNG_LL_NEEDS_RESET_WHEN_WAKEUP 1 +//Default value for the RNG timer clock divider +#define RNG_LL_CFG_PSCALE 255 #ifdef __cplusplus extern "C" { @@ -27,6 +31,16 @@ static inline void rng_ll_enable_sample(bool enable) LPPERI.rng_cfg.rng_sample_enable = enable; } +/** + * @brief Set RNG timer prescaler + * + * @param prescaler Timer prescaler value (0-255) + */ +static inline void rng_ll_set_timer_prescaler(uint8_t prescaler) +{ + LPPERI.rng_cfg.rng_timer_pscale = prescaler; +} + /** * @brief Enable or disable rng xor rtc timer. * @@ -64,6 +78,7 @@ static inline void rng_ll_reset(void) static inline void rng_ll_enable(void) { _lp_clkrst_ll_enable_rng_clock(true); + rng_ll_set_timer_prescaler(RNG_LL_CFG_PSCALE); rng_ll_enable_sample(true); rng_ll_enable_rtc_timer(true); rng_ll_enable_rng_timer(true); @@ -82,6 +97,15 @@ static inline void rng_ll_disable(void) _lp_clkrst_ll_enable_rng_clock(false); } +/** + * @brief Check that the RNG is live: clocked and out of reset. + * + * @return True if the RNG is enabled and operational, false otherwise. + */ +static inline bool rng_ll_is_enabled(void) +{ + return LPPERI.clk_en.rng_ck_en && !LPPERI.reset_en.lp_rng_reset_en; +} #ifdef __cplusplus } diff --git a/components/hal/esp32c6/include/hal/rng_ll.h b/components/hal/esp32c6/include/hal/rng_ll.h new file mode 100644 index 00000000000..24c854e3ec8 --- /dev/null +++ b/components/hal/esp32c6/include/hal/rng_ll.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include +#include "soc/soc.h" +#include "soc/lpperi_reg.h" +#include "soc/lpperi_struct.h" +#include "hal/lp_clkrst_ll.h" + +#ifdef __cplusplus +extern "C" { +#endif + +static inline uint32_t rng_ll_read_data(void) +{ + return REG_READ(LPPERI_RNG_DATA_REG); +} + +static inline void rng_ll_enable(void) +{ + _lp_clkrst_ll_enable_rng_clock(true); +} + +static inline void rng_ll_disable(void) +{ + _lp_clkrst_ll_enable_rng_clock(false); +} + +static inline bool rng_ll_is_enabled(void) +{ + return LPPERI.clk_en.rng_ck_en; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32c61/include/hal/rng_ll.h b/components/hal/esp32c61/include/hal/rng_ll.h new file mode 100644 index 00000000000..03796b7a82e --- /dev/null +++ b/components/hal/esp32c61/include/hal/rng_ll.h @@ -0,0 +1,115 @@ +/* + * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include +#include "soc/soc.h" +#include "soc/lpperi_reg.h" +#include "soc/lpperi_struct.h" + +//Default value for the RNG timer clock divider +#define RNG_LL_CFG_PSCALE 255 + +#ifdef __cplusplus +extern "C" { +#endif + +static inline uint32_t rng_ll_read_data(void) +{ + return REG_READ(LPPERI_RNG_DATA_SYNC_REG); +} + +/** + * @brief Enable or disable RNG sampling. + * + * @param enable True to enable, False to disable + */ +static inline void rng_ll_enable_sample(bool enable) +{ + REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RNG_SAMPLE_ENABLE, enable); +} + +/** + * @brief Set RNG timer prescaler + * + * @param prescaler Timer prescaler value (0-255) + */ +static inline void rng_ll_set_timer_prescaler(uint8_t prescaler) +{ + REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_PSCALE, prescaler); +} + +/** + * @brief Enable or disable rng xor rtc timer. + * + * @param enable True to enable, False to disable + */ +static inline void rng_ll_enable_rtc_timer(bool enable) +{ + REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RTC_TIMER_EN, enable ? 0x3 : 0x0); +} + +/** + * @brief Enable or disable rng xor async rng timer. + * + * @param enable True to enable, False to disable + */ +static inline void rng_ll_enable_rng_timer(bool enable) +{ + REG_SET_FIELD(LPPERI_RNG_CFG_REG, LPPERI_RNG_TIMER_EN, enable); +} + +/** + * @brief Reset RNG. + */ +static inline void rng_ll_reset(void) +{ + LPPERI.reset_en.lp_rng_reset_en = 1; + LPPERI.reset_en.lp_rng_reset_en = 0; +} + +/** + * @brief Enable RNG module + * + * TODO: unify in rng_hal.c + */ +static inline void rng_ll_enable(void) +{ + LPPERI.clk_en.rng_ck_en = 1; + rng_ll_set_timer_prescaler(RNG_LL_CFG_PSCALE); + rng_ll_enable_sample(true); + rng_ll_enable_rtc_timer(true); + rng_ll_enable_rng_timer(true); +} + +/** + * @brief Disable RNG module + * + * TODO: unify in rng_hal.c + */ +static inline void rng_ll_disable(void) +{ + rng_ll_enable_sample(false); + rng_ll_enable_rtc_timer(false); + rng_ll_enable_rng_timer(false); + LPPERI.clk_en.rng_ck_en = 0; +} + +/** + * @brief Check that the RNG is live: clocked and out of reset. + * + * @return True if the RNG is enabled and operational, false otherwise. + */ +static inline bool rng_ll_is_enabled(void) +{ + return LPPERI.clk_en.rng_ck_en && !LPPERI.reset_en.lp_rng_reset_en; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32h2/include/hal/rng_ll.h b/components/hal/esp32h2/include/hal/rng_ll.h new file mode 100644 index 00000000000..d6ed15f98b7 --- /dev/null +++ b/components/hal/esp32h2/include/hal/rng_ll.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include +#include "soc/soc.h" +#include "soc/lpperi_reg.h" +#include "soc/lpperi_struct.h" +#include "hal/lp_clkrst_ll.h" + +#ifdef __cplusplus +extern "C" { +#endif + +static inline uint32_t rng_ll_read_data(void) +{ + return REG_READ(LPPERI_RNG_DATA_REG); +} + +static inline void rng_ll_enable(void) +{ + _lp_clkrst_ll_enable_rng_clock(true); +} + +static inline void rng_ll_disable(void) +{ + _lp_clkrst_ll_enable_rng_clock(false); +} + +static inline bool rng_ll_is_enabled(void) +{ + return LPPERI_REG_GET(clk_en.rng_ck_en); +} + +#ifdef __cplusplus +} +#endif