From e923a5468695576433c413fcc82fc05b630a77f2 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Wed, 25 Feb 2026 15:33:25 +0800 Subject: [PATCH] fix(esp_hw_support): fix build dependencies for peripherals that do not yet support retention --- components/esp_hal_gpio/esp32s31/sdm_periph.c | 2 +- .../esp_hal_timg/esp32s31/timer_periph.c | 2 +- components/esp_hw_support/sleep_gpio.c | 2 + components/esp_hw_support/sleep_modes.c | 2 + components/esp_system/int_wdt.c | 2 +- components/hal/include/hal/etm_periph.h | 2 +- .../esp32s31/include/soc/Kconfig.soc_caps.in | 16 ---- .../include/soc/retention_periph_defs.h | 84 +++++++++++++++++++ .../soc/esp32s31/include/soc/soc_caps.h | 8 +- 9 files changed, 96 insertions(+), 24 deletions(-) create mode 100644 components/soc/esp32s31/include/soc/retention_periph_defs.h diff --git a/components/esp_hal_gpio/esp32s31/sdm_periph.c b/components/esp_hal_gpio/esp32s31/sdm_periph.c index 375d70fe8e5..9bab401cebd 100644 --- a/components/esp_hal_gpio/esp32s31/sdm_periph.c +++ b/components/esp_hal_gpio/esp32s31/sdm_periph.c @@ -53,7 +53,7 @@ static const regdma_entries_config_t gpio_ext_regdma_entries[] = { // backup stage: save configuration and status registers // restore stage: restore the configuration and status registers [0] = { - .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_GPIO_EXT_LINK(0x00), + .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_SDM_LINK(0x00), GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_BASE, GPIO_EXT_RETENTION_REGS_CNT, 0, 0, gpio_ext_regs_map[0], gpio_ext_regs_map[1], diff --git a/components/esp_hal_timg/esp32s31/timer_periph.c b/components/esp_hal_timg/esp32s31/timer_periph.c index 0024dcda9e2..308c0935889 100644 --- a/components/esp_hal_timg/esp32s31/timer_periph.c +++ b/components/esp_hal_timg/esp32s31/timer_periph.c @@ -33,7 +33,7 @@ const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = { } }; -#if SOC_PAU_SUPPORTED +#if SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION /* Registers in retention context: * TIMG_T0CONFIG_REG * TIMG_T0ALARMLO_REG diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c index 4e50ddc0875..4d01436d8d1 100644 --- a/components/esp_hw_support/sleep_gpio.c +++ b/components/esp_hw_support/sleep_gpio.c @@ -239,7 +239,9 @@ void esp_deep_sleep_wakeup_io_reset(void) if ((rtc_io_mask & BIT(rtcio_num)) == 0) { continue; } +#if SOC_RTCIO_HOLD_SUPPORTED rtcio_hal_hold_disable(rtcio_num); +#endif rtc_io_mask &= ~BIT(rtcio_num); } #endif diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index f2e5b7faed0..ef8473c4dfb 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -2154,8 +2154,10 @@ static void ext1_wakeup_prepare(void) rtcio_hal_function_select(rtc_pin, RTCIO_LL_FUNC_DIGITAL); // set input enable gpio_ll_input_enable(&GPIO, gpio); +#if SOC_RTCIO_HOLD_SUPPORTED // hold rtc_pin to use it during sleep state rtcio_hal_hold_enable(rtc_pin); +#endif #endif // Keep track of pins which are processed to bail out early rtc_gpio_mask &= ~BIT(rtc_pin); diff --git a/components/esp_system/int_wdt.c b/components/esp_system/int_wdt.c index 0a98483286f..3a43caf2035 100644 --- a/components/esp_system/int_wdt.c +++ b/components/esp_system/int_wdt.c @@ -24,7 +24,7 @@ #include "esp_private/periph_ctrl.h" #include "esp_private/esp_int_wdt.h" -#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_TIMER_SUPPORT_SLEEP_RETENTION +#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION #include "esp_private/sleep_retention.h" #endif diff --git a/components/hal/include/hal/etm_periph.h b/components/hal/include/hal/etm_periph.h index c4c79408900..cdaa6c6bbde 100644 --- a/components/hal/include/hal/etm_periph.h +++ b/components/hal/include/hal/etm_periph.h @@ -22,7 +22,7 @@ extern "C" { #endif -#if SOC_HAS(PAU) +#if SOC_HAS(PAU) && SOC_ETM_SUPPORT_SLEEP_RETENTION typedef struct { periph_retention_module_t module; // ID of the ETM as a retention module diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 2aafda18cef..81bdaa499c5 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -191,10 +191,6 @@ config SOC_GDMA_SUPPORT_ETM bool default y -config SOC_GDMA_SUPPORT_SLEEP_RETENTION - bool - default y - config SOC_GDMA_EXT_MEM_ENC_ALIGNMENT int default 16 @@ -307,18 +303,10 @@ config SOC_TIMER_SUPPORT_ETM bool default y -config SOC_TIMER_SUPPORT_SLEEP_RETENTION - bool - default y - config SOC_MWDT_SUPPORT_XTAL bool default y -config SOC_MWDT_SUPPORT_SLEEP_RETENTION - bool - default y - config SOC_EFUSE_DIS_PAD_JTAG bool default y @@ -467,10 +455,6 @@ config SOC_PM_SUPPORT_VDDSDIO_PD bool default y -config SOC_PM_SUPPORT_TOP_PD - bool - default y - config SOC_PM_SUPPORT_HP_AON_PD bool default y diff --git a/components/soc/esp32s31/include/soc/retention_periph_defs.h b/components/soc/esp32s31/include/soc/retention_periph_defs.h new file mode 100644 index 00000000000..ff690a6d962 --- /dev/null +++ b/components/soc/esp32s31/include/soc/retention_periph_defs.h @@ -0,0 +1,84 @@ +/* + * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 OR MIT + */ + +#pragma once + +#include +#include "soc_caps.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum periph_retention_module { + SLEEP_RETENTION_MODULE_MIN = 0, + SLEEP_RETENTION_MODULE_NULL = 1, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */ + /* clock module, which includes system and modem */ + SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 2, + /* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM, + * TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */ + SLEEP_RETENTION_MODULE_SYS_PERIPH = 3, + /* Timer Group by target*/ + SLEEP_RETENTION_MODULE_TG0_WDT = 4, + SLEEP_RETENTION_MODULE_TG1_WDT = 5, + SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6, + SLEEP_RETENTION_MODULE_TG0_TIMER1 = 7, + SLEEP_RETENTION_MODULE_TG1_TIMER0 = 8, + SLEEP_RETENTION_MODULE_TG1_TIMER1 = 9, + + /* AHB_DMA by channel */ + SLEEP_RETENTION_MODULE_AHB_DMA_CH0 = 10, + SLEEP_RETENTION_MODULE_AHB_DMA_CH1 = 11, + SLEEP_RETENTION_MODULE_AHB_DMA_CH2 = 12, + SLEEP_RETENTION_MODULE_AHB_DMA_CH3 = 13, + SLEEP_RETENTION_MODULE_AHB_DMA_CH4 = 14, + /* AXI_DMA by channel */ + SLEEP_RETENTION_MODULE_AXI_DMA_CH0 = 15, + SLEEP_RETENTION_MODULE_AXI_DMA_CH1 = 16, + SLEEP_RETENTION_MODULE_AXI_DMA_CH2 = 17, + /* MISC Peripherals */ + SLEEP_RETENTION_MODULE_UART0 = 18, + SLEEP_RETENTION_MODULE_UART1 = 19, + SLEEP_RETENTION_MODULE_UART2 = 20, + SLEEP_RETENTION_MODULE_UART3 = 21, + SLEEP_RETENTION_MODULE_RMT0 = 22, + SLEEP_RETENTION_MODULE_I2S0 = 23, + SLEEP_RETENTION_MODULE_I2S1 = 24, + SLEEP_RETENTION_MODULE_I2C0 = 25, + SLEEP_RETENTION_MODULE_I2C1 = 26, + SLEEP_RETENTION_MODULE_ETM0 = 27, + SLEEP_RETENTION_MODULE_TWAI0 = 28, + SLEEP_RETENTION_MODULE_TWAI1 = 29, + SLEEP_RETENTION_MODULE_PARLIO0 = 30, + SLEEP_RETENTION_MODULE_GPSPI2 = 31, + SLEEP_RETENTION_MODULE_GPSPI3 = 32, + SLEEP_RETENTION_MODULE_LEDC0 = 33, + SLEEP_RETENTION_MODULE_LEDC1 = 34, + SLEEP_RETENTION_MODULE_MCPWM0 = 35, + SLEEP_RETENTION_MODULE_MCPWM1 = 36, + SLEEP_RETENTION_MODULE_MCPWM2 = 37, + SLEEP_RETENTION_MODULE_MCPWM3 = 38, + SLEEP_RETENTION_MODULE_PCNT0 = 39, + SLEEP_RETENTION_MODULE_PCNT1 = 40, + SLEEP_RETENTION_MODULE_SDM0 = 41, + + /* Modem module, which includes WiFi, BLE and 802.15.4 */ + SLEEP_RETENTION_MODULE_WIFI_MAC = 42, + SLEEP_RETENTION_MODULE_WIFI_BB = 43, + SLEEP_RETENTION_MODULE_BLE_MAC = 44, + SLEEP_RETENTION_MODULE_BT_BB = 45, + SLEEP_RETENTION_MODULE_802154_MAC = 46, + SLEEP_RETENTION_MODULE_CLOCK_MODEM = 47, + SLEEP_RETENTION_MODULE_MODEM_PHY = 48, + + SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1 +} periph_retention_module_t; + +#define is_top_domain_module(m) ((m >= SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) && ((m <= SLEEP_RETENTION_MODULE_SDM0))) + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index 4127f82c6b0..0eb2cccb21a 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -146,7 +146,7 @@ /*-------------------------- GDMA CAPS -------------------------------------*/ #define SOC_AHB_GDMA_VERSION 2 #define SOC_GDMA_SUPPORT_ETM 1 -#define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1 +// #define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1 // TODO: [ESP32S31] IDF-14760 #define SOC_GDMA_EXT_MEM_ENC_ALIGNMENT (16) /*-------------------------- APM CAPS ----------------------------------------*/ @@ -228,12 +228,12 @@ /*--------------------------- TIMER GROUP CAPS ---------------------------------------*/ #define SOC_TIMER_SUPPORT_ETM (1) -#define SOC_TIMER_SUPPORT_SLEEP_RETENTION (1) +// #define SOC_TIMER_SUPPORT_SLEEP_RETENTION (1) // TODO: [ESP32S31] IDF-14746 /*--------------------------- WATCHDOG CAPS ---------------------------------------*/ // TODO: [ESP32S31] IDF-14656 #define SOC_MWDT_SUPPORT_XTAL (1) -#define SOC_MWDT_SUPPORT_SLEEP_RETENTION (1) +// #define SOC_MWDT_SUPPORT_SLEEP_RETENTION (1) /*-------------------------- eFuse CAPS----------------------------*/ // TODO: [ESP32S31] IDF-14688 @@ -300,7 +300,7 @@ #define SOC_PM_SUPPORT_RC32K_PD (1) #define SOC_PM_SUPPORT_RC_FAST_PD (1) #define SOC_PM_SUPPORT_VDDSDIO_PD (1) -#define SOC_PM_SUPPORT_TOP_PD (1) +// #define SOC_PM_SUPPORT_TOP_PD (1) // TODO: [ESP32S31] IDF-14647 #define SOC_PM_SUPPORT_HP_AON_PD (1) #define SOC_PM_SUPPORT_CNNT_PD (1) #define SOC_PM_SUPPORT_RTC_PERIPH_PD (1)