From e7499410fade180366347cb8c27c65751a22e71e Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Thu, 6 Aug 2026 21:41:59 +0530 Subject: [PATCH] fix(esp_hw_support): run ESP32-P4 PMA programming from IRAM The bootloader locks PMA entries on core 0 only (PMA is per-hart), so core 1 applies its PMA configuration with effective writes. Executing that from flash momentarily makes the flash aperture non-cacheable while reprogramming its entry, which executes ciphertext with flash encryption enabled (illegal instruction -> CPU lockup). --- components/esp_hw_support/port/esp32p4/cpu_region_protect.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_hw_support/port/esp32p4/cpu_region_protect.c b/components/esp_hw_support/port/esp32p4/cpu_region_protect.c index ab682877734..1cedcf39394 100644 --- a/components/esp_hw_support/port/esp32p4/cpu_region_protect.c +++ b/components/esp_hw_support/port/esp32p4/cpu_region_protect.c @@ -38,7 +38,7 @@ #define ALIGN_DOWN_TO_MMU_PAGE_SIZE(addr) ((addr) & ~((SOC_MMU_PAGE_SIZE) - 1)) #define ALIGN_UP(addr, align) (((addr) + (align) - 1) & ~((align) - 1)) -static void esp_cpu_configure_invalid_regions(void) +NOINLINE_ATTR IRAM_ATTR static void esp_cpu_configure_invalid_regions(void) { const unsigned PMA_NONE = PMA_L | PMA_EN; __attribute__((unused)) const unsigned PMA_RW = PMA_L | PMA_EN | PMA_R | PMA_W;