Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

feat(esp_hw_support): add analog_wait calibration in sleep flow for h4

Browse Source
This commit is contained in:
hebinglin
2026-07-14 17:13:32 +08:00
parent bd61356c03
commit e71b30c279
10 changed files with 104 additions and 63 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/include/esp_private/esp_pmu.h
+1 -1
View File
@@ -188,7 +188,7 @@ extern "C" {
typedef struct {
pmu_hal_context_t *hal;
void *mc;
#if SOC_PM_SLEEP_CLK_ICG_USE_REGDMA
#if SOC_PM_SLEEP_CLK_ICG_USE_REGDMA || CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
void *priv;
#endif
#if SOC_SPI_FLASH_HAS_DEDICATED_LDO
components/esp_hw_support/include/esp_private/sleep_power.h
-43
View File
@@ -1,43 +0,0 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stddef.h>
#include <string.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdbool.h>
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp_attr.h"
#include "esp_check.h"
#include "esp_regdma.h"
#include "esp_private/sleep_retention.h"
#include "esp_private/startup_internal.h"
#include "soc/soc_caps.h"
#ifdef __cplusplus
extern "C" {
#endif
#if CONFIG_BT_CTRL_SLEEP_ENABLE && SOC_PM_MODEM_LOCK_CLK_WORKAROUND
/**
* @brief System power retention initialize.
*
* @return
* - ESP_OK on success
* - ESP_ERR_NO_MEM not enough memory for system power retention
* - ESP_ERR_INVALID_ARG if either of the arguments is out of range
*/
esp_err_t sleep_power_system_retention_init(void *arg);
#endif
#ifdef __cplusplus
}
#endif
components/esp_hw_support/linker.lf
+2
View File
@@ -46,6 +46,8 @@ entries:
pmu_sleep (noflash)
if PM_SLEEP_CLK_ICG_ENABLE = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP != y:
pmu_sleep_clock_icg:pmu_sleep_clock_icg_config (noflash)
if IDF_TARGET_ESP32H4 = y && BT_LE_MODEM_STATE_ENABLED = y:
pmu_sleep_power:pmu_sleep_power_analog_wait_config (noflash)
sleep_mspi (noflash)
if PM_SLP_IRAM_OPT = y && IDF_TARGET_ESP32S31 != y:
pmu_param:get_act_lp_dbias (noflash)
components/esp_hw_support/lowpower/CMakeLists.txt
-6
View File
@@ -40,12 +40,6 @@ if((CONFIG_SOC_PM_SUPPORT_MODEM_PD OR CONFIG_SOC_PM_SUPPORT_TOP_PD) AND CONFIG_S
list(APPEND srcs "port/${target}/sleep_clock.c")
endif()
if(CONFIG_BT_CTRL_SLEEP_ENABLE AND CONFIG_SOC_PM_MODEM_LOCK_CLK_WORKAROUND)
list(APPEND srcs "port/${target}/sleep_power.c")
set_property(TARGET ${COMPONENT_LIB}
APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u sleep_power_system_retention_init")
endif()
if(CONFIG_SOC_PM_SUPPORT_PMU_MODEM_STATE)
list(APPEND srcs "port/${target}/sleep_modem_state.c")
endif()
components/esp_hw_support/port/esp32h4/CMakeLists.txt
+5
View File
@@ -14,6 +14,11 @@ endif()
if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "sar_periph_ctrl.c")
if(CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT)
list(APPEND srcs "pmu_sleep_power.c")
endif()
endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}")
components/esp_hw_support/port/esp32h4/pmu_sleep.c
+9
View File
@@ -256,6 +256,15 @@ static void pmu_sleep_param_init(pmu_context_t *ctx, const pmu_sleep_param_confi
pmu_ll_set_modem_wait_target_cycle(ctx->hal->dev, param->hp_sys.modem_wakeup_wait_cycle);
pmu_ll_set_xtal_stable_wait_cycle(ctx->hal->dev, param->hp_lp.xtal_stable_wait_slow_clk_cycle);
pmu_ll_set_pll_stable_wait_cycle(ctx->hal->dev, param->hp_sys.pll_stable_wait_cycle);
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
uint16_t ana_wait[ANALOG_WAIT_CTRL_NUM] = {
0x20, // about 1.6us
param->hp_sys.analog_wait_target_cycle,
param->hp_sys.analog_wait_target_cycle,
};
pmu_sleep_power_analog_wait_config(ctx->priv, ana_wait);
#endif
}
bool pmu_sleep_pll_already_enabled(void)
components/esp_hw_support/lowpower/port/esp32h4/sleep_power.c → components/esp_hw_support/port/esp32h4/pmu_sleep_power.c
+68 -11
View File
@@ -4,15 +4,23 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp_private/sleep_power.h"
#include "esp_check.h"
#include "esp_macros.h"
#include "esp_pmu.h"
#include "soc/pmu_reg.h"
#include "modem/modem_lpcon_reg.h"
#include "esp_private/esp_regdma.h"
#include "esp_private/sleep_retention.h"
#include "esp_private/startup_internal.h"
#include "pmu_param.h"
ESP_LOG_ATTR_TAG(TAG, "sleep_power");
#if CONFIG_BT_CTRL_SLEEP_ENABLE && SOC_PM_MODEM_LOCK_CLK_WORKAROUND
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
esp_err_t sleep_power_system_retention_init(void *arg)
static esp_err_t sleep_power_system_retention_init(void *arg)
{
const static sleep_retention_entries_config_t power_regs_retention[] = {
/* During the modem-to-active transition, the MODEM lock keeps the xtalx2, bbpll xpd status unchanged.
@@ -26,41 +34,90 @@ esp_err_t sleep_power_system_retention_init(void *arg)
return ESP_OK;
}
#endif
#define SLEEP_POWER_ANA_WAIT_LINK_BASE 10
#define SLEEP_POWER_ANA_WAIT_LINK_ID(_idx) REGDMA_POWER_LINK((SLEEP_POWER_ANA_WAIT_LINK_BASE + (_idx)))
typedef struct {
void *regdma_desc[ANALOG_WAIT_CTRL_NUM];
} pmu_sleep_power_ana_wait_context_t;
static esp_err_t sleep_power_analog_wait_ctrl_init(void *arg)
{
const static sleep_retention_entries_config_t analog_wait_ctrl_retention[] = {
/* Sleep to Modem retention has passed hp analog wait duration, so Modem to Sleep retention can reduce this time.
* So here Sleep to Modem retention set the analog wait duration to 0, and Modem to Sleep retention set the analog wait duration to origin value. */
[0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(2), PMU_SLP_WAKEUP_CNTL7_REG, 0x200000, PMU_ANA_WAIT_TARGET_M, 1, 0), .owner = ENTRY(1) },
[1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(3), PMU_SLP_WAKEUP_CNTL7_REG, 0xE9D0000, PMU_ANA_WAIT_TARGET_M, 0, 1), .owner = ENTRY(1) },
[2] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(4), PMU_SLP_WAKEUP_CNTL7_REG, 0xE9D0000, PMU_ANA_WAIT_TARGET_M, 1, 0), .owner = ENTRY(2) },
* So here Sleep to Modem retention set the analog wait duration to about 1.6us, and Modem to Sleep retention set the analog wait duration to origin value. */
[0] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(10), PMU_SLP_WAKEUP_CNTL7_REG, (0x20 << PMU_ANA_WAIT_TARGET_S), PMU_ANA_WAIT_TARGET_M, 1, 0), .owner = ENTRY(1) },
[1] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(11), PMU_SLP_WAKEUP_CNTL7_REG, (PMU_HP_ANALOG_WAIT_TARGET_CYCLES << PMU_ANA_WAIT_TARGET_S), PMU_ANA_WAIT_TARGET_M, 0, 1), .owner = ENTRY(1) },
[2] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_POWER_LINK(12), PMU_SLP_WAKEUP_CNTL7_REG, (PMU_HP_ANALOG_WAIT_TARGET_CYCLES << PMU_ANA_WAIT_TARGET_S), PMU_ANA_WAIT_TARGET_M, 1, 0), .owner = ENTRY(2) },
};
esp_err_t err = sleep_retention_entries_create(analog_wait_ctrl_retention, ARRAY_SIZE(analog_wait_ctrl_retention), REGDMA_LINK_PRI_POWER, SLEEP_RETENTION_MODULE_POWER);
pmu_sleep_power_ana_wait_context_t *ana_wait_context = (pmu_sleep_power_ana_wait_context_t *)arg;
for (int i = 0; i < ANALOG_WAIT_CTRL_NUM; i++) {
if (!ana_wait_context->regdma_desc[i]) {
void *head = sleep_retention_find_link_by_id(SLEEP_POWER_ANA_WAIT_LINK_ID(i));
if (head) {
ana_wait_context->regdma_desc[i] = head;
}
}
}
ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for analog wait ctrl retention");
ESP_LOGI(TAG, "Analog wait ctrl sleep retention initialization");
return ESP_OK;
}
static esp_err_t sleep_power_retention_init(void *arg)
{
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
ESP_RETURN_ON_ERROR(sleep_power_system_retention_init(arg), TAG, "system retention init failed");
#endif
ESP_RETURN_ON_ERROR(sleep_power_analog_wait_ctrl_init(arg), TAG, "analog wait ctrl retention init failed");
return ESP_OK;
}
static esp_err_t sleep_power_retention_deinit(void *arg)
{
pmu_sleep_power_ana_wait_context_t *ana_wait_ctx = (pmu_sleep_power_ana_wait_context_t *)arg;
for (int i = 0; i < ANALOG_WAIT_CTRL_NUM; i++) {
ana_wait_ctx->regdma_desc[i] = NULL;
}
return ESP_OK;
}
ESP_SYSTEM_INIT_FN(sleep_power_startup_init, SECONDARY, BIT(0), 108)
{
static DRAM_ATTR pmu_sleep_power_ana_wait_context_t ana_wait_ctx;
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_power_retention_init, .arg = NULL } },
.cbs = {
.create = { .handle = sleep_power_retention_init, .arg = &ana_wait_ctx },
.destroy = { .handle = sleep_power_retention_deinit, .arg = &ana_wait_ctx },
},
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE | SLEEP_RETENTION_MODULE_ATTR_ATTACH
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_POWER, &init_param);
if (err != ESP_OK) {
ESP_LOGW(TAG, "failed to init power retention module, err=%d", err);
} else {
PMU_instance()->priv = &ana_wait_ctx;
}
return ESP_OK;
}
#endif
void pmu_sleep_power_analog_wait_config(void *ana_wait_context, const uint16_t analog_wait[ANALOG_WAIT_CTRL_NUM])
{
if (!ana_wait_context) {
return;
}
pmu_sleep_power_ana_wait_context_t *ana_wait_ctx = (pmu_sleep_power_ana_wait_context_t *)ana_wait_context;
for (int i = 0; i < ANALOG_WAIT_CTRL_NUM; i++) {
if (!ana_wait_ctx->regdma_desc[i]) {
continue;
}
regdma_link_set_write_wait_content(ana_wait_ctx->regdma_desc[i], (uint32_t)analog_wait[i] << PMU_ANA_WAIT_TARGET_S, PMU_ANA_WAIT_TARGET_M);
}
}
components/esp_hw_support/port/esp32h4/private_include/pmu_param.h
+10 -1
View File
@@ -110,7 +110,16 @@ typedef struct {
const pmu_lp_system_analog_param_t* pmu_lp_system_analog_param_default(pmu_lp_mode_t mode);
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
#define ANALOG_WAIT_CTRL_NUM 3 // S2M, M2S, M2A
/**
* @brief Update content of selected analog wait ctrl REGDMA links.
*
* @param ana_wait_context Analog wait ctrl context.
* @param analog_wait Update analog wait values at S2M, M2S, M2A retention links.
*/
void pmu_sleep_power_analog_wait_config(void *ana_wait_context, const uint16_t analog_wait[ANALOG_WAIT_CTRL_NUM]);
#endif
/* Following software configuration instance type from pmu_struct.h used for the PMU state machine in sleep flow*/
typedef union {