diff --git a/components/esp_driver_spi/include/esp_private/spi_common_internal.h b/components/esp_driver_spi/include/esp_private/spi_common_internal.h index e604254ed8e..83ffb43de82 100644 --- a/components/esp_driver_spi/include/esp_private/spi_common_internal.h +++ b/components/esp_driver_spi/include/esp_private/spi_common_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,16 +9,14 @@ #pragma once #include +#include "esp_pm.h" #include "driver/spi_common.h" #include "hal/spi_types.h" #include "hal/dma_types.h" #include "soc/ext_mem_defs.h" //for SOC_NON_CACHEABLE_OFFSET #include "esp_private/spi_dma.h" -#include "esp_pm.h" -#include "esp_private/spi_share_hw_ctrl.h" -#if SOC_GDMA_SUPPORTED #include "esp_private/gdma.h" -#endif +#include "esp_private/spi_share_hw_ctrl.h" #ifdef __cplusplus extern "C" diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c index 99adebb6d2c..946059e80d6 100644 --- a/components/esp_driver_spi/src/gpspi/spi_master.c +++ b/components/esp_driver_spi/src/gpspi/spi_master.c @@ -337,7 +337,7 @@ static esp_err_t spi_master_init_driver(spi_host_device_t host_id) } spi_hal_init(&host->hal, host_id); - spi_hal_config_io_default_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); + spi_hal_set_data_pin_idle_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); if (host_id != SPI1_HOST) { //SPI1 attributes are already initialized at start up. diff --git a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h index bd838e71e69..51c3f3fc23f 100644 --- a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -250,13 +250,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h index e1553d16d95..af58b4b29ee 100644 --- a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -250,13 +250,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h index 8ad078822cd..b19a742e369 100644 --- a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -899,13 +899,16 @@ static inline void spi_ll_master_set_cs_setup(spi_dev_t *hw, uint8_t setup) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /*------------------------------------------------------------------------------ diff --git a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h index 8e4212fa3a3..7f0925967e6 100644 --- a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -235,13 +235,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h index 404a2ce126b..99904a0c827 100644 --- a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -261,13 +261,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h index 9af0a43ea31..e5217849729 100644 --- a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -236,13 +236,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h index 4ccbabfc2da..e60ccdbb32c 100644 --- a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -222,13 +222,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h index 06d8a8fe75e..1283ff4e6d7 100644 --- a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -283,13 +283,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h index 2d2fdc78e37..694446b16ee 100644 --- a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -932,13 +932,16 @@ static inline void spi_ll_set_mosi_delay(spi_dev_t *hw, int delay_mode, int dela } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h index 90a4d2fb383..129a2d5d19f 100644 --- a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -268,13 +268,14 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h index fe247a09972..4ba9572a694 100644 --- a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -261,13 +261,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/include/hal/spi_hal.h b/components/esp_hal_gpspi/include/hal/spi_hal.h index 022880d4254..a95511debc1 100644 --- a/components/esp_hal_gpspi/include/hal/spi_hal.h +++ b/components/esp_hal_gpspi/include/hal/spi_hal.h @@ -163,12 +163,12 @@ typedef struct { void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id); /** - * Config default output IO level when don't have transaction + * Config default output data IO level when bus idle * * @param hal Context of the HAL layer. * @param level IO level to config */ -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level); +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level); /** * Deinit the peripheral (and the context if needed). diff --git a/components/esp_hal_gpspi/spi_hal.c b/components/esp_hal_gpspi/spi_hal.c index 1e653663695..f46b43bc2e3 100644 --- a/components/esp_hal_gpspi/spi_hal.c +++ b/components/esp_hal_gpspi/spi_hal.c @@ -27,11 +27,11 @@ void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id) spi_ll_apply_config(hw); } -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level) +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level) { #if SPI_LL_MOSI_FREE_LEVEL // Config default output data line level when don't have transaction - spi_ll_set_mosi_free_level(hal->hw, level); + spi_ll_set_data_pin_idle_level(hal->hw, level); spi_ll_apply_config(hal->hw); #endif }