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feat(adc): move adc periph enable/reset functions to ll layer

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This commit is contained in:
gaoxu
2024-06-12 18:16:45 +08:00
parent 3f5037866b
commit e63d6582cc
14 changed files with 209 additions and 46 deletions
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components/esp_hw_support/adc_share_hw_ctrl.c
+8 -6
View File
@@ -12,7 +12,7 @@
*
* However, usages of above components are different.
* Therefore, we put the common used parts into `esp_hw_support`, including:
* - adc power maintainance
* - adc power maintenance
* - adc hw calibration settings
* - adc locks, to prevent concurrently using adc hw
*/
@@ -205,10 +205,10 @@ void adc_apb_periph_claim(void)
portENTER_CRITICAL(&s_spinlock);
s_adc_digi_ctrlr_cnt++;
if (s_adc_digi_ctrlr_cnt == 1) {
//enable ADC digital part
periph_module_enable(PERIPH_SARADC_MODULE);
//reset ADC digital part
periph_module_reset(PERIPH_SARADC_MODULE);
ADC_BUS_CLK_ATOMIC() {
adc_ll_enable_bus_clock(true);
adc_ll_reset_register();
}
}
portEXIT_CRITICAL(&s_spinlock);
@@ -219,7 +219,9 @@ void adc_apb_periph_free(void)
portENTER_CRITICAL(&s_spinlock);
s_adc_digi_ctrlr_cnt--;
if (s_adc_digi_ctrlr_cnt == 0) {
periph_module_disable(PERIPH_SARADC_MODULE);
ADC_BUS_CLK_ATOMIC() {
adc_ll_enable_bus_clock(false);
}
} else if (s_adc_digi_ctrlr_cnt < 0) {
portEXIT_CRITICAL(&s_spinlock);
ESP_LOGE(TAG, "%s called, but `s_adc_digi_ctrlr_cnt == 0`", __func__);
components/esp_hw_support/include/esp_private/adc_share_hw_ctrl.h
+7 -1
View File
@@ -12,7 +12,7 @@
*
* However, usages of above components are different.
* Therefore, we put the common used parts into `esp_hw_support`, including:
* - adc power maintainance
* - adc power maintenance
* - adc hw calibration settings
* - adc locks, to prevent concurrently using adc hw
*/
@@ -26,6 +26,12 @@
extern "C" {
#endif
#if SOC_RCC_IS_INDEPENDENT || CONFIG_IDF_TARGET_ESP32
#define ADC_BUS_CLK_ATOMIC()
#else
#define ADC_BUS_CLK_ATOMIC() PERIPH_RCC_ATOMIC()
#endif
#if SOC_ADC_CALIBRATION_V1_SUPPORTED
/*---------------------------------------------------------------
ADC Hardware Calibration