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https://github.com/espressif/esp-idf.git
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feat(usb/host): Update ISOC scheduler for HS endpoints
USB-OTG uses 'sched_info' field of HCTSIZ register to schedule transactions in USB microframes.
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@@ -235,7 +235,6 @@ hcd_pipe_handle_t test_hcd_pipe_alloc(hcd_port_handle_t port_hdl, const usb_ep_d
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//Create a queue for pipe callback to queue up pipe events
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QueueHandle_t pipe_evt_queue = xQueueCreate(EVENT_QUEUE_LEN, sizeof(pipe_event_msg_t));
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TEST_ASSERT_NOT_NULL(pipe_evt_queue);
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printf("Creating pipe\n");
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hcd_pipe_config_t pipe_config = {
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.callback = pipe_callback,
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.callback_arg = (void *)pipe_evt_queue,
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@@ -1,11 +1,12 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdio.h>
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#include <string.h>
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#include "soc/usb_dwc_cfg.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "unity.h"
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@@ -18,6 +19,7 @@
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#define ISOC_PACKET_SIZE MOCK_ISOC_EP_MPS
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#define URB_DATA_BUFF_SIZE (NUM_PACKETS_PER_URB * ISOC_PACKET_SIZE)
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#define POST_ENQUEUE_DELAY_US 20
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#define ENQUEUE_DELAY (OTG_HSPHY_INTERFACE ? 100 : 500) // With this delay we want to enqueue the URBs at different times
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/*
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Test HCD ISOC pipe URBs
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@@ -95,6 +97,108 @@ TEST_CASE("Test HCD isochronous pipe URBs", "[isoc][full_speed]")
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test_hcd_wait_for_disconn(port_hdl, false);
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}
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/*
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Test HCD ISOC pipe URBs with all channels and intervals combinations
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Purpose:
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- Test that the ISOC scheduler correctly schedules all channels and intervals
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Procedure:
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- Setup HCD and wait for connection
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- Allocate default pipe and enumerate the device
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- Allocate an isochronous pipe and multiple URBs. Each URB should contain multiple packets to test HCD's ability to
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schedule an URB across multiple intervals.
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- Repeat for all channels and intervals
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- Enqueue those URBs
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- Expect HCD_PIPE_EVENT_URB_DONE for each URB. Verify that data is correct using logic analyzer
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- Deallocate URBs
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- Teardown
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*/
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TEST_CASE("Test HCD isochronous pipe URBs all", "[isoc][full_speed]")
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{
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usb_speed_t port_speed = test_hcd_wait_for_conn(port_hdl); //Trigger a connection
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//The MPS of the ISOC OUT pipe is quite large, so we need to bias the FIFO sizing
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TEST_ASSERT_EQUAL(ESP_OK, hcd_port_set_fifo_bias(port_hdl, HCD_PORT_FIFO_BIAS_PTX));
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vTaskDelay(pdMS_TO_TICKS(100)); //Short delay send of SOF (for FS) or EOPs (for LS)
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//Enumerate and reset device
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hcd_pipe_handle_t default_pipe = test_hcd_pipe_alloc(port_hdl, NULL, 0, port_speed); //Create a default pipe (using a NULL EP descriptor)
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uint8_t dev_addr = test_hcd_enum_device(default_pipe);
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urb_t *urb_list[NUM_URBS];
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hcd_pipe_handle_t unused_pipes[OTG_NUM_HOST_CHAN];
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// For all channels
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for (int channel = 0; channel < OTG_NUM_HOST_CHAN - 1; channel++) {
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// Allocate unused pipes, so the active isoc_out_pipe uses different channel index
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for (int ch = 0; ch < channel; ch++) {
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unused_pipes[ch] = test_hcd_pipe_alloc(port_hdl, &mock_isoc_out_ep_desc, dev_addr + 1, port_speed);
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}
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// For all intervals
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for (int interval = 1; interval <= 6; interval++) {
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vTaskDelay(5);
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unsigned num_packets_per_urb = 32; // This is maximum number of packets if interval = 1. This is limited by FRAME_LIST_LEN
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num_packets_per_urb >>= (interval - 1);
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//Create ISOC OUT pipe
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usb_ep_desc_t isoc_out_ep = mock_isoc_out_ep_desc; // Implicit copy
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isoc_out_ep.bInterval = interval;
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isoc_out_ep.bEndpointAddress = interval; // So you can see the bInterval value in trace
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hcd_pipe_handle_t isoc_out_pipe = test_hcd_pipe_alloc(port_hdl, &isoc_out_ep, channel + 1, port_speed); // Channel number represented in dev_num, so you can see it in trace
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//Initialize URBs
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for (int urb_idx = 0; urb_idx < NUM_URBS; urb_idx++) {
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urb_list[urb_idx] = test_hcd_alloc_urb(num_packets_per_urb, num_packets_per_urb * ISOC_PACKET_SIZE);
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urb_list[urb_idx]->transfer.num_bytes = num_packets_per_urb * ISOC_PACKET_SIZE;
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urb_list[urb_idx]->transfer.context = URB_CONTEXT_VAL;
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for (int pkt_idx = 0; pkt_idx < num_packets_per_urb; pkt_idx++) {
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urb_list[urb_idx]->transfer.isoc_packet_desc[pkt_idx].num_bytes = ISOC_PACKET_SIZE;
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//Each packet will consist of the same byte, but each subsequent packet's byte will increment (i.e., packet 0 transmits all 0x0, packet 1 transmits all 0x1)
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memset(&urb_list[urb_idx]->transfer.data_buffer[pkt_idx * ISOC_PACKET_SIZE], (urb_idx * num_packets_per_urb) + pkt_idx, ISOC_PACKET_SIZE);
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}
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}
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// Add a delay so we start scheduling the transactions at different time in USB frame
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esp_rom_delay_us(ENQUEUE_DELAY * interval + ENQUEUE_DELAY * channel);
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//Enqueue URBs
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for (int i = 0; i < NUM_URBS; i++) {
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TEST_ASSERT_EQUAL(ESP_OK, hcd_urb_enqueue(isoc_out_pipe, urb_list[i]));
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}
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//Wait for each done event from each URB
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for (int i = 0; i < NUM_URBS; i++) {
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test_hcd_expect_pipe_event(isoc_out_pipe, HCD_PIPE_EVENT_URB_DONE);
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}
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//Dequeue URBs
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for (int urb_idx = 0; urb_idx < NUM_URBS; urb_idx++) {
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urb_t *urb = hcd_urb_dequeue(isoc_out_pipe);
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TEST_ASSERT_EQUAL(urb_list[urb_idx], urb);
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TEST_ASSERT_EQUAL(URB_CONTEXT_VAL, urb->transfer.context);
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//Overall URB status and overall number of bytes
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TEST_ASSERT_EQUAL(num_packets_per_urb * ISOC_PACKET_SIZE, urb->transfer.actual_num_bytes);
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TEST_ASSERT_EQUAL_MESSAGE(USB_TRANSFER_STATUS_COMPLETED, urb->transfer.status, "Transfer NOT completed");
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for (int pkt_idx = 0; pkt_idx < num_packets_per_urb; pkt_idx++) {
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TEST_ASSERT_EQUAL_MESSAGE(USB_TRANSFER_STATUS_COMPLETED, urb->transfer.isoc_packet_desc[pkt_idx].status, "Transfer NOT completed");
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}
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}
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//Free URB list and pipe
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for (int i = 0; i < NUM_URBS; i++) {
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test_hcd_free_urb(urb_list[i]);
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}
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test_hcd_pipe_free(isoc_out_pipe);
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}
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// Free unused pipes
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for (int ch = 0; ch < channel; ch++) {
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test_hcd_pipe_free(unused_pipes[ch]);
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}
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}
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test_hcd_pipe_free(default_pipe);
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//Cleanup
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test_hcd_wait_for_disconn(port_hdl, false);
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}
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/*
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Test a port sudden disconnect with an active ISOC pipe
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