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Merge branch 'bugfix/lp_io_clock_control' into 'master'

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fix(rtcio): RTC GPIO configuration should be written only if LP IO clock exists

Closes IDF-14951

See merge request espressif/esp-idf!46146
This commit is contained in:
Song Ruo Jing
2026-03-04 19:23:33 +08:00
parent d8df5d32fe d4005779e0
commit e3a2865606
49 changed files with 294 additions and 179 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hal_gpio/esp32/include/hal/gpio_ll.h
+1
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@@ -739,6 +739,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c2/include/hal/gpio_ll.h
+1
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@@ -545,6 +545,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c3/include/hal/gpio_ll.h
+1
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@@ -542,6 +542,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c5/include/hal/gpio_ll.h
+1
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@@ -529,6 +529,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c5/include/hal/rtc_io_ll.h
+3 -1
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@@ -25,7 +25,9 @@
#include "hal/misc.h"
#include "hal/assert.h"
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-6 correspond to gpio 0-6
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32c6/include/hal/gpio_ll.h
+1
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@@ -493,6 +493,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c6/include/hal/rtc_io_ll.h
+3 -1
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@@ -24,7 +24,9 @@
#include "hal/misc.h"
#include "hal/assert.h"
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-7 correspond to gpio 0-7
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32c61/include/hal/gpio_ll.h
+1
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@@ -529,6 +529,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32c61/include/hal/rtc_io_ll.h
+3 -1
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@@ -25,7 +25,9 @@
#include "hal/misc.h"
#include "hal/assert.h"
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-6 correspond to gpio 0-6
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32h2/include/hal/gpio_ll.h
+1
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@@ -539,6 +539,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32h21/include/hal/gpio_ll.h
+1
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@@ -520,6 +520,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32h4/include/hal/gpio_ll.h
+1
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@@ -538,6 +538,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->funcn_out_sel_cfg[gpio_num].oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32h4/include/hal/rtc_io_ll.h
+3 -1
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@@ -25,7 +25,9 @@
#include "hal/misc.h"
#include "hal/assert.h"
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-5 correspond to gpio 0-5
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32p4/include/hal/gpio_ll.h
+1
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@@ -655,6 +655,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32p4/include/hal/rtc_io_ll.h
+3 -1
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@@ -25,7 +25,9 @@
#include "hal/assert.h"
#include "hal/config.h"
#define RTCIO_LL_PIN_FUNC 1 // LP_GPIO function
#define RTCIO_LL_PIN_FUNC 1 // LP_GPIO function
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-15 correspond to gpio 0-15
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32s2/include/hal/gpio_ll.h
+1
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@@ -560,6 +560,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32s2/include/hal/rtc_io_ll.h
+3 -1
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@@ -22,7 +22,9 @@
#include "soc/rtc_cntl_reg.h"
#include "soc/sens_struct.h"
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-21 correspond to gpio 0-21
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32s3/include/hal/gpio_ll.h
+1
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@@ -562,6 +562,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32s3/include/hal/rtc_io_ll.h
+3 -1
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@@ -26,7 +26,9 @@
#include "soc/sens_struct.h"
#include "soc/rtc_cntl_reg.h"
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_PIN_FUNC 0
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-21 correspond to gpio 0-21
#ifdef __cplusplus
extern "C" {
components/esp_hal_gpio/esp32s31/include/hal/gpio_ll.h
+1
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@@ -582,6 +582,7 @@ static inline void gpio_ll_set_input_signal_matrix_source(gpio_dev_t *hw, uint32
* @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
* @param oen_inv True if the output enable needs to be inverted, otherwise False.
*/
__attribute__((always_inline))
static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
{
hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO
components/esp_hal_gpio/esp32s31/include/hal/rtc_io_ll.h
+3 -1
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@@ -24,7 +24,9 @@
#include "hal/misc.h"
#include "hal/assert.h"
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_PIN_FUNC 1
#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-7 correspond to gpio 0-7
#ifdef __cplusplus
extern "C" {