From 50291d721e5dd9c0f7863f650b0d75105c7a16c3 Mon Sep 17 00:00:00 2001 From: Samuel Obuch Date: Thu, 3 Sep 2026 07:46:42 +0000 Subject: [PATCH 1/4] feat(tools): update openocd version to v0.12.0-esp32-20260831 --- tools/tools.json | 56 ++++++++++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/tools/tools.json b/tools/tools.json index cd9a79630de..cb3c9af548a 100644 --- a/tools/tools.json +++ b/tools/tools.json @@ -694,51 +694,51 @@ "versions": [ { "linux-amd64": { - "sha256": "4b71d1b4d8e4025029466e780161262a04137348b68e965c15250dbeebef03ce", - "size": 2700256, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-linux-amd64-0.12.0-esp32-20260703.tar.gz" + "sha256": "89dcf8efc32296fa5c1f1cfb0268b82a2f14ce9b9cdcf76e817c51365aee6e5a", + "size": 2677335, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-linux-amd64-0.12.0-esp32-20260831.tar.gz" }, "linux-arm64": { - "sha256": "3ce059a26a543e96b19bef15a29b850aadaff1d4e2dc291e8c1ab45e331a5f1c", - "size": 2641141, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-linux-arm64-0.12.0-esp32-20260703.tar.gz" + "sha256": "59236b2160dfcef1db3dbb0b7718e0ed9e127630dd65c5ccb6f13ef56c1e84ba", + "size": 2608313, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-linux-arm64-0.12.0-esp32-20260831.tar.gz" }, "linux-armel": { - "sha256": "deb167155c994cd60db93626caf92638614364c16bdc145957eec61950e0ad15", - "size": 2818366, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-linux-armel-0.12.0-esp32-20260703.tar.gz" + "sha256": "3d1f6f9738ed9ad7851cc474d60e81c1c77f0e04dfe1142c1bee72561b07b9e6", + "size": 2774449, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-linux-armel-0.12.0-esp32-20260831.tar.gz" }, "linux-armhf": { - "sha256": "0cf9b1209d81bf233d39c86b1bf8f0090905ee5f04797a92fbf8b695b5e97c6d", - "size": 2645566, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-linux-armhf-0.12.0-esp32-20260703.tar.gz" + "sha256": "d7aec93eef19025549637c451b80959915bdcbf22793242eb615121e726f6a3d", + "size": 2604460, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-linux-armhf-0.12.0-esp32-20260831.tar.gz" }, "macos": { - "sha256": "489daa179ecde646ebf1d2288c96d398f1b8b620ac7487b7c57c3bc45cef0202", - "size": 2893284, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-macos-0.12.0-esp32-20260703.tar.gz" + "sha256": "0db9db27da168e1c280f223767251d54cd5ccbf794460a2bf4284d15517a61dc", + "size": 2836639, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-macos-0.12.0-esp32-20260831.tar.gz" }, "macos-arm64": { - "sha256": "fe366c8b72fc287fbdf5d62a1178dd882c37dc4a5c29205f126a6c3125aa9f41", - "size": 2694457, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-macos-arm64-0.12.0-esp32-20260703.tar.gz" + "sha256": "75dc62bf15d5a20a92b1c809048896c9af0ca5024fd89d4219b3b5b92f3a9f88", + "size": 2638802, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-macos-arm64-0.12.0-esp32-20260831.tar.gz" }, - "name": "v0.12.0-esp32-20260703", + "name": "v0.12.0-esp32-20260831", "status": "recommended", "win-arm64": { - "sha256": "20ff818eb708a4e4b8dbcab820394cceb3c9aeb0e0285b9048681e3ed9058f53", - "size": 3050450, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-windows-arm64-0.12.0-esp32-20260703.zip" + "sha256": "29c8e4b675f2c082f5b9365796c45ae5ef45083e199afd4974d05a84dd474717", + "size": 3050423, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-win-arm64-0.12.0-esp32-20260831.zip" }, "win32": { - "sha256": "b72e45d6629e9370b59b80998ae47c1aaaf954e6795e7bf515c972ec9fc3f026", - "size": 3290643, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-win32-0.12.0-esp32-20260703.zip" + "sha256": "b3a7cce1f16d63c5023f97c3408bda1c10371bcb76e88e3ddb1111918cdc77a2", + "size": 3291881, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-win32-0.12.0-esp32-20260831.zip" }, "win64": { - "sha256": "a49147705e49be9cab4af473e58b5730d99a0220d10f0976a04bf725cd0aa960", - "size": 3290643, - "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260703/openocd-esp32-win64-0.12.0-esp32-20260703.zip" + "sha256": "d508bbe1d166e38415d57b495dd0409f46883251087433cfb3eabf513be93ff7", + "size": 3291878, + "url": "https://github.com/espressif/openocd-esp32/releases/download/v0.12.0-esp32-20260831/openocd-esp32-win64-0.12.0-esp32-20260831.zip" } } ] From 8f2272d7d3289e44ab4a854e32375207b6403762 Mon Sep 17 00:00:00 2001 From: Samuel Obuch Date: Thu, 3 Sep 2026 12:47:29 +0200 Subject: [PATCH 2/4] ci(ulp): disable lp_core/debugging test --- examples/system/ulp/.build-test-rules.yml | 4 ++-- .../system/ulp/lp_core/debugging/pytest_lp_core_debugging.py | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/system/ulp/.build-test-rules.yml b/examples/system/ulp/.build-test-rules.yml index 3ef1abb041d..24586686b46 100644 --- a/examples/system/ulp/.build-test-rules.yml +++ b/examples/system/ulp/.build-test-rules.yml @@ -15,9 +15,9 @@ examples/system/ulp/lp_core/debugging: enable: - if: SOC_LP_CORE_SUPPORTED == 1 disable_test: - - if: IDF_TARGET in ["esp32s31"] + - if: IDF_TARGET in ["esp32c5", "esp32c6", "esp32p4", "esp32s31"] temporary: true - reason: ESP32-S31 not supported yet + reason: unstable test <<: *ulp_default_depends examples/system/ulp/lp_core/gpio: diff --git a/examples/system/ulp/lp_core/debugging/pytest_lp_core_debugging.py b/examples/system/ulp/lp_core/debugging/pytest_lp_core_debugging.py index 2a17fc948d4..6ffaaafca81 100644 --- a/examples/system/ulp/lp_core/debugging/pytest_lp_core_debugging.py +++ b/examples/system/ulp/lp_core/debugging/pytest_lp_core_debugging.py @@ -14,7 +14,7 @@ if typing.TYPE_CHECKING: @idf_parametrize('target', ['esp32c5', 'esp32c6', 'esp32p4', 'esp32s31'], indirect=['target']) -@pytest.mark.temp_skip_ci(targets=['esp32s31'], reason='s31-lpcore not supported in latest OpenOCD release yet') +@pytest.mark.temp_skip_ci(targets=['esp32c5', 'esp32c6', 'esp32p4', 'esp32s31'], reason='unstable test') @idf_parametrize('port', ['/dev/serial_ports/ttyUSB-esp32'], indirect=['port']) @pytest.mark.usb_serial_jtag def test_lp_core_debugging(openocd_dut: 'OpenOCD', dut: IdfDut) -> None: From 3e788612eca916b8e9984dff49d86c8aa0c2c1c9 Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Mon, 27 Jul 2026 14:37:01 +0300 Subject: [PATCH 3/4] change(system): increase OCD stub memory reservation from 8K to 12K --- components/esp_system/Kconfig | 4 ++-- components/esp_system/ld/ld.iram.sections | 4 ++-- components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in | 2 +- components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in | 2 +- docs/en/api-guides/jtag-debugging/tips-and-quirks.rst | 2 +- docs/zh_CN/api-guides/jtag-debugging/tips-and-quirks.rst | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 71ad3b87356..0bb456518d6 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -406,7 +406,7 @@ menu "ESP System Settings" which does some useful debugging stuff, e.g. GCOV data dump. config ESP_DEBUG_INCLUDE_OCD_STUB_BINS - bool "Preload OpenOCD stub binaries to speed up debugging. 8K memory will be reserved" + bool "Preload OpenOCD stub binaries to speed up debugging. 12K memory will be reserved" default n depends on SOC_DEBUG_HAVE_OCD_STUB_BINS help @@ -415,7 +415,7 @@ menu "ESP System Settings" To execute stub code, OpenOCD allocates memory on the target device, backs up the existing memory, loads the stub binary, runs the binary, and then restores the original memory. This process can be time-consuming, especially when using USB serial JTAG. - By enabling this option, 8K of memory in RAM will be preallocated with the stub code, + By enabling this option, 12K of memory in RAM will be preallocated with the stub code, eliminating the need to back up and restore the memory region. config ESP_DEBUG_OCDAWARE diff --git a/components/esp_system/ld/ld.iram.sections b/components/esp_system/ld/ld.iram.sections index b34dfee26e9..42f1b50d752 100644 --- a/components/esp_system/ld/ld.iram.sections +++ b/components/esp_system/ld/ld.iram.sections @@ -9,14 +9,14 @@ /* Do not move this block! OpenOCD expects this to be at the beginning of IRAM. */ KEEP(*(.ocd_stub.code)); KEEP(*(.ocd_stub.tramp)); - . = ALIGN(0x800); + . = ALIGN(0x1000); KEEP(*(.ocd_stub.data)); KEEP(*(.ocd_stub.bss)); KEEP(*(.ocd_stub.stack)); KEEP(*(.ocd_stub.params)); . = ALIGN(0x1000); KEEP(*(.ocd_stub.scratchmem)); - ASSERT(ABSOLUTE(.) == _iram_start + 0x2000, "openocd stub memory must be ended at _iram_start + 0x2000"); + ASSERT(ABSOLUTE(.) == _iram_start + 0x3000, "openocd stub memory must be ended at _iram_start + 0x3000"); #endif /* Vectors go to start of IRAM */ diff --git a/components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in b/components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in index 880d3aecfe6..d3afa44be3e 100644 --- a/components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in +++ b/components/esp_tee/subproject/main/ld/esp32c6/esp_tee.ld.in @@ -33,7 +33,7 @@ */ #if CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS -PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x22e0 ); +PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x32e0 ); #else PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x2e0 ); #endif diff --git a/components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in b/components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in index 6c44e49b05a..1a956401a36 100644 --- a/components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in +++ b/components/esp_tee/subproject/main/ld/esp32h2/esp_tee.ld.in @@ -33,7 +33,7 @@ */ #if CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS -PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x22e0 ); +PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x32e0 ); #else PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x2e0 ); #endif diff --git a/docs/en/api-guides/jtag-debugging/tips-and-quirks.rst b/docs/en/api-guides/jtag-debugging/tips-and-quirks.rst index ef487e6652e..86628514748 100644 --- a/docs/en/api-guides/jtag-debugging/tips-and-quirks.rst +++ b/docs/en/api-guides/jtag-debugging/tips-and-quirks.rst @@ -115,7 +115,7 @@ In order to achieve higher data rates and minimize number of dropped packets it Improve Debugging Speed ^^^^^^^^^^^^^^^^^^^^^^^ - Enabling :ref:`CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS` allocates 8 KB of RAM and embeds pre-built stub binaries into RAM. This improves the overall debugging speed by eliminating the need to load the stub binaries at runtime. It is particularly beneficial when using flash breakpoints, as it reduces the latency of add/remove breakpoints. However, keep in mind that the increased RAM usage may reduce memory availability for other tasks. + Enabling :ref:`CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS` allocates 12 KB of RAM and embeds pre-built stub binaries into RAM. This improves the overall debugging speed by eliminating the need to load the stub binaries at runtime. It is particularly beneficial when using flash breakpoints, as it reduces the latency of add/remove breakpoints. However, keep in mind that the increased RAM usage may reduce memory availability for other tasks. .. _jtag-debugging-tip-debugger-startup-commands: diff --git a/docs/zh_CN/api-guides/jtag-debugging/tips-and-quirks.rst b/docs/zh_CN/api-guides/jtag-debugging/tips-and-quirks.rst index 5d40ffa05c1..864e20a72d0 100644 --- a/docs/zh_CN/api-guides/jtag-debugging/tips-and-quirks.rst +++ b/docs/zh_CN/api-guides/jtag-debugging/tips-and-quirks.rst @@ -115,7 +115,7 @@ GDB 具有 FreeRTOS 支持的 Python 扩展模块。在系统要求满足的情 提高调试速度 ^^^^^^^^^^^^^^^^^^^^^^^ - 启用 :ref:`CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS` 将预先分配 8 KB 的 RAM, 且预编译的存根二进制文件将嵌入到 RAM 中，因此运行时将无需加载存根二进制文件，从而提高整体调试速度。在使用 flash 断点时，上述优化可以有效降低添加和删除断点的延迟。但要注意，RAM 使用量的增加可能会占用其他任务所需的内存。 + 启用 :ref:`CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS` 将预先分配 12 KB 的 RAM, 且预编译的存根二进制文件将嵌入到 RAM 中，因此运行时将无需加载存根二进制文件，从而提高整体调试速度。在使用 flash 断点时，上述优化可以有效降低添加和删除断点的延迟。但要注意，RAM 使用量的增加可能会占用其他任务所需的内存。 .. _jtag-debugging-tip-debugger-startup-commands: From bc8cd6ce4c1fcfcd4678c48b6e1dc3761ffaed63 Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Mon, 27 Jul 2026 17:04:28 +0300 Subject: [PATCH 4/4] feat(system): add OCD stub bin support for more targets Add SOC_DEBUG_HAVE_OCD_STUB_BINS for esp32c5, esp32c61, esp32h4, esp32h21, esp32p4, and esp32s31. Update TEE linker scripts with correct esp_tee_app_config offsets for the 0x3000 stub reservation --- components/esp_system/Kconfig | 7 +++++++ .../esp_system/openocd_stub_bins/CMakeLists.txt | 12 ++++++++---- .../esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in | 5 +++++ .../subproject/main/ld/esp32c61/esp_tee.ld.in | 5 +++++ .../soc/esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c5/include/soc/soc_caps.h | 3 +++ .../soc/esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c61/include/soc/soc_caps.h | 3 +++ .../soc/esp32h21/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32h21/include/soc/soc_caps.h | 3 +++ .../soc/esp32h4/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32h4/include/soc/soc_caps.h | 3 +++ .../soc/esp32p4/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32p4/include/soc/soc_caps.h | 3 +++ .../soc/esp32s31/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32s31/include/soc/soc_caps.h | 3 +++ 16 files changed, 67 insertions(+), 4 deletions(-) diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 0bb456518d6..0804d0d6923 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -409,6 +409,7 @@ menu "ESP System Settings" bool "Preload OpenOCD stub binaries to speed up debugging. 12K memory will be reserved" default n depends on SOC_DEBUG_HAVE_OCD_STUB_BINS + depends on !IDF_TARGET_ESP32P4 || ESP32P4_SELECTS_REV_LESS_V3 || CACHE_L2_CACHE_512KB help OpenOCD uses stub code to access flash during programming or when inserting and removing SW flash breakpoints. @@ -418,6 +419,12 @@ menu "ESP System Settings" By enabling this option, 12K of memory in RAM will be preallocated with the stub code, eliminating the need to back up and restore the memory region. + The stub binaries are prebuilt and linked to run at the start of IRAM (_iram_start). + On ESP32-P4 rev >= v3, _iram_start is 0x4FF00000 + L2 cache size, so it only matches the + stub's link address (0x4FF80000) when the L2 cache is 512KB. This option is therefore + only available on ESP32-P4 rev >= v3 when CACHE_L2_CACHE_512KB is selected. Earlier P4 + revisions and other targets place _iram_start at a fixed address and are not affected. + config ESP_DEBUG_OCDAWARE bool "Make exception and panic handlers JTAG/OCD aware" default y diff --git a/components/esp_system/openocd_stub_bins/CMakeLists.txt b/components/esp_system/openocd_stub_bins/CMakeLists.txt index ebd73f430aa..ee420877f76 100644 --- a/components/esp_system/openocd_stub_bins/CMakeLists.txt +++ b/components/esp_system/openocd_stub_bins/CMakeLists.txt @@ -15,10 +15,14 @@ set(openocd_path $ENV{OPENOCD_SCRIPTS}) if(openocd_path) set(stub_bin_path ${openocd_path}/../espressif/stub_bins) - if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${target}) - set(code_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_code.inc") - set(data_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_data.inc") - set(img_header "${stub_bin_path}/${target}/stub_flash_idf_image.h") + set(stub_target_dir ${target}) + if(target STREQUAL "esp32p4" AND CONFIG_ESP32P4_REV_MIN_FULL LESS 300) + set(stub_target_dir "esp32p4-rev1") + endif() + if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${stub_target_dir}) + set(code_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_code.inc") + set(data_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_data.inc") + set(img_header "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_image.h") if(EXISTS ${code_bin} AND EXISTS ${data_bin} AND EXISTS ${img_header}) set(dest_dir "${CMAKE_BINARY_DIR}/openocd_stub_bins") set(output_code_bin "${dest_dir}/stub_flash_idf_binary_code.inc") diff --git a/components/esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in b/components/esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in index becd7e7a5b4..bbb5c11442f 100644 --- a/components/esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in +++ b/components/esp_tee/subproject/main/ld/esp32c5/esp_tee.ld.in @@ -32,7 +32,12 @@ * should be stored via esp_app_tee_config structure */ +#if CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS +PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x32b0 ); +#else PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x2b0 ); +#endif + PROVIDE ( GDMA = 0x60080000 ); /* SPI Flash functions required from the ROM (refer esp32c5.rom.spiflash.ld) */ diff --git a/components/esp_tee/subproject/main/ld/esp32c61/esp_tee.ld.in b/components/esp_tee/subproject/main/ld/esp32c61/esp_tee.ld.in index 3e08a50c6bb..cbfa205a646 100644 --- a/components/esp_tee/subproject/main/ld/esp32c61/esp_tee.ld.in +++ b/components/esp_tee/subproject/main/ld/esp32c61/esp_tee.ld.in @@ -32,7 +32,12 @@ * should be stored via esp_app_tee_config structure */ +#if CONFIG_ESP_DEBUG_INCLUDE_OCD_STUB_BINS +PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x32b0 ); +#else PROVIDE ( esp_tee_app_config = SRAM_REE_SEG_START + 0x2b0 ); +#endif + PROVIDE ( GDMA = 0x60080000 ); /* SPI Flash functions required from the ROM (refer esp32c61.rom.spiflash.ld) */ diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 057ec4326b7..fe5c304d80b 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -1619,6 +1619,10 @@ config SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT bool default y +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y + config SOC_LP_CORE_SINGLE_INTERRUPT_VECTOR bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 45c721c44e1..225e20c6f3a 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -648,6 +648,9 @@ // #define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BLE and 15.4*/ #define SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT (1) +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1) + /*------------------------------------- ULP CAPS -------------------------------------*/ #define SOC_LP_CORE_SINGLE_INTERRUPT_VECTOR (1) /*!< LP Core interrupts all map to a single entry in vector table */ #define SOC_LP_CORE_SUPPORT_ETM (1) /*!< LP Core supports ETM */ diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 24d2ff9b3f3..0f5f8bf551c 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -1250,3 +1250,7 @@ config SOC_PHY_COMBO_MODULE config SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT bool default y + +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 3ca95cd1b3c..3d75a7603e2 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -505,5 +505,8 @@ #define SOC_PHY_COMBO_MODULE (1) /*!< Support Wi-Fi, BLE and 15.4*/ #define SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT (1) +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1) + /*------------------------------------- No Reset CAPS -------------------------------------*/ // \#define SOC_CAPS_NO_RESET_BY_ANA_BOD (1) //TODO: [ESP32C61] IDF-9254 diff --git a/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in index e060e6abd55..5bb5cae5a46 100644 --- a/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in @@ -1094,3 +1094,7 @@ config SOC_BLE_SUBRATE_SUPPORTED config SOC_BLE_PERIODIC_ADV_WITH_RESPONSE bool default y + +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y diff --git a/components/soc/esp32h21/include/soc/soc_caps.h b/components/soc/esp32h21/include/soc/soc_caps.h index 7843dc599ae..b496bec041c 100644 --- a/components/soc/esp32h21/include/soc/soc_caps.h +++ b/components/soc/esp32h21/include/soc/soc_caps.h @@ -503,3 +503,6 @@ #define SOC_BLE_CTE_SUPPORTED (1) /*!< Support Bluetooth LE Constant Tone Extension (CTE) */ #define SOC_BLE_SUBRATE_SUPPORTED (1) /*!< Support Bluetooth LE Connection Subrating */ #define SOC_BLE_PERIODIC_ADV_WITH_RESPONSE (1) /*!< Support Bluetooth LE Periodic Advertising with Response (PAwR) */ + +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1) diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in index 8644e5350c2..a51edc810e2 100644 --- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in @@ -1383,6 +1383,10 @@ config SOC_USB_FSLS_PHY_NUM int default 1 +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y + config SOC_ASRC_SUPPORTED bool default y diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h index 38db92fcbc5..cd59619a7e0 100644 --- a/components/soc/esp32h4/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -573,5 +573,8 @@ #define SOC_USB_OTG_PERIPH_NUM (1U) #define SOC_USB_FSLS_PHY_NUM (1U) +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1) + /*---------------------------------- ASRC CAPS ----------------------------------*/ #define SOC_ASRC_SUPPORTED (1) diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index c5e21f1b498..c1e55c84157 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -1958,3 +1958,7 @@ config SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE config SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED bool default y + +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index 26ec357bbc2..048544d8340 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -749,3 +749,6 @@ #define SOC_LP_CORE_SUPPORT_I2C (1) /*!< LP Core supports I2C */ #define SOC_LP_CORE_HW_AUTO_CLRWAKEUPCAUSE (1) /*!< LP core requests sleep, PMU clears both HP and LP wakeup causes */ #define SOC_LP_CORE_LP_UART_WAKEUP_KEEP_TRIGGERED (1) /*!< LP UART wakeup source is kept triggered */ + +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1) diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in index 30f72a7611e..93c7db4e07c 100644 --- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in @@ -1862,3 +1862,7 @@ config SOC_TEMPERATURE_SENSOR_SUPPORT_ETM config SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION bool default y + +config SOC_DEBUG_HAVE_OCD_STUB_BINS + bool + default y diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h index cd54063c888..3e593507cdb 100644 --- a/components/soc/esp32s31/include/soc/soc_caps.h +++ b/components/soc/esp32s31/include/soc/soc_caps.h @@ -692,3 +692,6 @@ #define SOC_TEMPERATURE_SENSOR_SUPPORT_ETM (1) // temperature sensor on esp32s31 in under low power domain. #define SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION (1) + +/*------------------------------------- DEBUG CAPS -------------------------------------*/ +#define SOC_DEBUG_HAVE_OCD_STUB_BINS (1)