diff --git a/components/esp_hal_uart/esp32c2/include/hal/uart_ll.h b/components/esp_hal_uart/esp32c2/include/hal/uart_ll.h
index c79102d39a1..aa32d30c8fd 100644
--- a/components/esp_hal_uart/esp32c2/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32c2/include/hal/uart_ll.h
@@ -33,7 +33,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_uart/esp32c3/include/hal/uart_ll.h b/components/esp_hal_uart/esp32c3/include/hal/uart_ll.h
index bcce4a72a0b..e5d5ae3eb2c 100644
--- a/components/esp_hal_uart/esp32c3/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32c3/include/hal/uart_ll.h
@@ -32,7 +32,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_uart/esp32c5/include/hal/uart_ll.h b/components/esp_hal_uart/esp32c5/include/hal/uart_ll.h
index 6ce3fa981f0..10c2fa04b45 100644
--- a/components/esp_hal_uart/esp32c5/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32c5/include/hal/uart_ll.h
@@ -40,7 +40,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32c6/include/hal/uart_ll.h b/components/esp_hal_uart/esp32c6/include/hal/uart_ll.h
index 6c49f03c4df..e48f7cda4ec 100644
--- a/components/esp_hal_uart/esp32c6/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32c6/include/hal/uart_ll.h
@@ -40,7 +40,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32c61/include/hal/uart_ll.h b/components/esp_hal_uart/esp32c61/include/hal/uart_ll.h
index 0626a20f987..1fa6f31294f 100644
--- a/components/esp_hal_uart/esp32c61/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32c61/include/hal/uart_ll.h
@@ -36,7 +36,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32h2/include/hal/uart_ll.h b/components/esp_hal_uart/esp32h2/include/hal/uart_ll.h
index ef4fd2d31eb..c823e94661f 100644
--- a/components/esp_hal_uart/esp32h2/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32h2/include/hal/uart_ll.h
@@ -35,7 +35,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32h21/include/hal/uart_ll.h b/components/esp_hal_uart/esp32h21/include/hal/uart_ll.h
index 51896d4d911..3e0264942af 100644
--- a/components/esp_hal_uart/esp32h21/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32h21/include/hal/uart_ll.h
@@ -35,7 +35,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32h4/include/hal/uart_ll.h b/components/esp_hal_uart/esp32h4/include/hal/uart_ll.h
index 90550a13b12..6e0d05f677f 100644
--- a/components/esp_hal_uart/esp32h4/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32h4/include/hal/uart_ll.h
@@ -32,7 +32,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #define UART_LL_PCR_REG_U32_SET(hw, reg_suffix, field_suffix, val)  \
     if ((hw) == &UART0) { \
diff --git a/components/esp_hal_uart/esp32p4/include/hal/uart_ll.h b/components/esp_hal_uart/esp32p4/include/hal/uart_ll.h
index ea23ec91e0b..7c3d5600db7 100644
--- a/components/esp_hal_uart/esp32p4/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32p4/include/hal/uart_ll.h
@@ -45,7 +45,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_uart/esp32s3/include/hal/uart_ll.h b/components/esp_hal_uart/esp32s3/include/hal/uart_ll.h
index 3ff206503ea..0048d64b57b 100644
--- a/components/esp_hal_uart/esp32s3/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32s3/include/hal/uart_ll.h
@@ -32,7 +32,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE          (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND  (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND  (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hal_uart/esp32s31/include/hal/uart_ll.h b/components/esp_hal_uart/esp32s31/include/hal/uart_ll.h
index 99c21fe1a4d..7c61881cfdc 100644
--- a/components/esp_hal_uart/esp32s31/include/hal/uart_ll.h
+++ b/components/esp_hal_uart/esp32s31/include/hal/uart_ll.h
@@ -47,7 +47,7 @@
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
 #define UART_LL_FSM_IDLE                       (0x0)
-#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)    // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/esp_hw_support/sleep_uart.c b/components/esp_hw_support/sleep_uart.c
index 4a26a81477b..cc6d5d008ed 100644
--- a/components/esp_hw_support/sleep_uart.c
+++ b/components/esp_hw_support/sleep_uart.c
@@ -38,7 +38,7 @@ static SLEEP_UART_FN_ATTR void suspend_uart(int uart_num)
 {
     uart_ll_force_xoff(uart_num);
     s_suspended_uarts_bmap |= BIT(uart_num);
-#if SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
+#ifdef UART_LL_FSM_TX_WAIT_SEND
     uint32_t uart_fsm = 0;
     do {
         uart_fsm = uart_ll_get_tx_fsm_status(uart_num);
diff --git a/components/soc/esp32/include/soc/uart_pins.h b/components/soc/esp32/include/soc/uart_pins.h
index 9c01dfaf3ff..d32f9175473 100644
--- a/components/soc/esp32/include/soc/uart_pins.h
+++ b/components/soc/esp32/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0TXD_GPIO_NUM  (1)
 #define U0RXD_GPIO_NUM  (3)
@@ -32,23 +30,23 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
-#define U0RTS_MUX_FUNC  (FUNC_GPIO22_U0RTS)
-#define U0CTS_MUX_FUNC  (FUNC_GPIO19_U0CTS)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
+#define U0RTS_MUX_FUNC  (3)
+#define U0CTS_MUX_FUNC  (3)
 #define U0DTR_MUX_FUNC  (-1)
 #define U0DSR_MUX_FUNC  (-1)
 
-#define U1TXD_MUX_FUNC  (FUNC_SD_DATA3_U1TXD)
-#define U1RXD_MUX_FUNC  (FUNC_SD_DATA2_U1RXD)
-#define U1RTS_MUX_FUNC  (FUNC_SD_CMD_U1RTS)
-#define U1CTS_MUX_FUNC  (FUNC_SD_CLK_U1CTS)
+#define U1TXD_MUX_FUNC  (4)
+#define U1RXD_MUX_FUNC  (4)
+#define U1RTS_MUX_FUNC  (4)
+#define U1CTS_MUX_FUNC  (4)
 #define U1DTR_MUX_FUNC  (-1)
 #define U1DSR_MUX_FUNC  (-1)
 
-#define U2TXD_MUX_FUNC  (FUNC_GPIO17_U2TXD)
-#define U2RXD_MUX_FUNC  (FUNC_GPIO16_U2RXD)
-#define U2RTS_MUX_FUNC  (FUNC_SD_DATA0_U2RTS)
-#define U2CTS_MUX_FUNC  (FUNC_SD_DATA1_U2CTS)
+#define U2TXD_MUX_FUNC  (4)
+#define U2RXD_MUX_FUNC  (4)
+#define U2RTS_MUX_FUNC  (4)
+#define U2CTS_MUX_FUNC  (4)
 #define U2DTR_MUX_FUNC  (-1)
 #define U2DSR_MUX_FUNC  (-1)
diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
index b5a4c060fa9..dee7385030c 100644
--- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
@@ -619,10 +619,6 @@ config SOC_UART_SUPPORT_XTAL_CLK
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
     bool
     default y
diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h
index b463d53f70d..d385bcd6678 100644
--- a/components/soc/esp32c2/include/soc/soc_caps.h
+++ b/components/soc/esp32c2/include/soc/soc_caps.h
@@ -280,9 +280,6 @@
 #define SOC_UART_SUPPORT_RTC_CLK    (1)     /*!< Support RTC clock as the clock source */
 #define SOC_UART_SUPPORT_XTAL_CLK   (1)     /*!< Support XTAL clock as the clock source */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 
 /*-------------------------- COEXISTENCE CAPS -------------------------------*/
diff --git a/components/soc/esp32c2/include/soc/uart_pins.h b/components/soc/esp32c2/include/soc/uart_pins.h
index 9d12399007a..561089f25b8 100644
--- a/components/soc/esp32c2/include/soc/uart_pins.h
+++ b/components/soc/esp32c2/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 19
 #define U0TXD_GPIO_NUM 20
@@ -25,8 +23,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
index 4109352e9e2..02c2191c6aa 100644
--- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
@@ -843,10 +843,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE
     bool
     default y
diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h
index a396dc14ce9..397b72c24e0 100644
--- a/components/soc/esp32c3/include/soc/soc_caps.h
+++ b/components/soc/esp32c3/include/soc/soc_caps.h
@@ -368,9 +368,6 @@
 #define SOC_UART_SUPPORT_XTAL_CLK   (1)     /*!< Support XTAL clock as the clock source */
 #define SOC_UART_SUPPORT_WAKEUP_INT (1)         /*!< Support UART wakeup interrupt */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 
 /*--------------------------- UHCI CAPS -------------------------------------*/
diff --git a/components/soc/esp32c3/include/soc/uart_pins.h b/components/soc/esp32c3/include/soc/uart_pins.h
index 5644807a0b7..3106337f15d 100644
--- a/components/soc/esp32c3/include/soc/uart_pins.h
+++ b/components/soc/esp32c3/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 20
 #define U0TXD_GPIO_NUM 21
@@ -25,8 +23,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
index bf8c9f2fb2f..525707eaada 100644
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -1347,10 +1347,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
     int
     default 5
diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h
index 96a9e8df234..1f8353976ff 100644
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -543,9 +543,6 @@
 #define SOC_UART_HAS_LP_UART               (1)         /*!< Support LP UART */
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)         /*!< Support back up registers before sleep */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 #define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE   (1)
diff --git a/components/soc/esp32c5/include/soc/uart_pins.h b/components/soc/esp32c5/include/soc/uart_pins.h
index a4bcfb6fc1c..ce100142b40 100644
--- a/components/soc/esp32c5/include/soc/uart_pins.h
+++ b/components/soc/esp32c5/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 12
 #define U0TXD_GPIO_NUM 11
@@ -32,8 +30,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
index 7643be75b99..b072812f6d1 100644
--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -1099,10 +1099,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
     int
     default 5
diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h
index 236afd6e0dd..fa29adb9dab 100644
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -451,9 +451,6 @@
 #define SOC_UART_HAS_LP_UART            (1)         /*!< Support LP UART */
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)         /*!< Support back up registers before sleep */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 #define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE   (1)
diff --git a/components/soc/esp32c6/include/soc/uart_pins.h b/components/soc/esp32c6/include/soc/uart_pins.h
index b840d59f4cf..bb1025802f4 100644
--- a/components/soc/esp32c6/include/soc/uart_pins.h
+++ b/components/soc/esp32c6/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 17
 #define U0TXD_GPIO_NUM 16
@@ -32,8 +30,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
index 6331a637c5e..4637ef82c5a 100644
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -999,10 +999,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
     int
     default 5
diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h
index 01338475004..5464177c60c 100644
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -409,9 +409,6 @@
 #define SOC_UART_SUPPORT_WAKEUP_INT     (1)         /*!< Support UART wakeup interrupt */
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)      /*!< Support back up registers before sleep */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 #define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE   (1)
diff --git a/components/soc/esp32c61/include/soc/uart_pins.h b/components/soc/esp32c61/include/soc/uart_pins.h
index 5e65adec6e1..3562965787b 100644
--- a/components/soc/esp32c61/include/soc/uart_pins.h
+++ b/components/soc/esp32c61/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 10
 #define U0TXD_GPIO_NUM 11
@@ -32,8 +30,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
index 35b7fca386e..2a9c9ee3ee6 100644
--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@@ -1103,10 +1103,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h
index 96088bddf55..4afbdfb933e 100644
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@@ -473,9 +473,6 @@
 #define SOC_UART_SUPPORT_XTAL_CLK           (1)     /*!< Support XTAL clock as the clock source */
 #define SOC_UART_SUPPORT_WAKEUP_INT         (1)     /*!< Support UART wakeup interrupt */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)         /*!< Support back up registers before sleep */
 
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
diff --git a/components/soc/esp32h2/include/soc/uart_pins.h b/components/soc/esp32h2/include/soc/uart_pins.h
index 71c7d048a57..ccc95788108 100644
--- a/components/soc/esp32h2/include/soc/uart_pins.h
+++ b/components/soc/esp32h2/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 23
 #define U0TXD_GPIO_NUM 24
@@ -25,8 +23,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
index e774e2decfb..9251d3d0e6f 100644
--- a/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
@@ -895,10 +895,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
diff --git a/components/soc/esp32h21/include/soc/soc_caps.h b/components/soc/esp32h21/include/soc/soc_caps.h
index 7acc80ab723..e8b97c20701 100644
--- a/components/soc/esp32h21/include/soc/soc_caps.h
+++ b/components/soc/esp32h21/include/soc/soc_caps.h
@@ -441,9 +441,6 @@
 #define SOC_UART_SUPPORT_XTAL_CLK           (1)     /*!< Support XTAL clock as the clock source */
 #define SOC_UART_SUPPORT_WAKEUP_INT         (1)     /*!< Support UART wakeup interrupt */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)         /*!< Support back up registers before sleep */
 
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
diff --git a/components/soc/esp32h21/include/soc/uart_pins.h b/components/soc/esp32h21/include/soc/uart_pins.h
index a42e3d3d3b7..5da49c1e406 100644
--- a/components/soc/esp32h21/include/soc/uart_pins.h
+++ b/components/soc/esp32h21/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 15
 #define U0TXD_GPIO_NUM 16
@@ -25,8 +23,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
index 31e71e940d5..68e0b08ede5 100644
--- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
@@ -895,10 +895,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h
index 6ab09a2b7fa..bad9772eafb 100644
--- a/components/soc/esp32h4/include/soc/soc_caps.h
+++ b/components/soc/esp32h4/include/soc/soc_caps.h
@@ -450,9 +450,6 @@
 #define SOC_UART_SUPPORT_XTAL_CLK       (1)         /*!< Support XTAL clock as the clock source */
 #define SOC_UART_SUPPORT_WAKEUP_INT     (1)         /*!< Support UART wakeup interrupt */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)         /*!< Support back up registers before sleep */
 
 // #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
diff --git a/components/soc/esp32h4/include/soc/uart_pins.h b/components/soc/esp32h4/include/soc/uart_pins.h
index 4a6e2446a9a..8b89ccd6c01 100644
--- a/components/soc/esp32h4/include/soc/uart_pins.h
+++ b/components/soc/esp32h4/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM  23
 #define U0TXD_GPIO_NUM  24
@@ -25,8 +23,8 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 /* No func for the following pins, they shall not be used */
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
index 2802afde3a5..92412464123 100644
--- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
@@ -1711,10 +1711,6 @@ config SOC_UART_SUPPORT_SLEEP_RETENTION
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
     int
     default 5
diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h
index 20f3c26ffb5..011ecc203c8 100644
--- a/components/soc/esp32p4/include/soc/soc_caps.h
+++ b/components/soc/esp32p4/include/soc/soc_caps.h
@@ -649,9 +649,6 @@
 #define SOC_UART_HAS_LP_UART            (1)         /*!< Support LP UART */
 #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)      /*!< Support back up registers before sleep */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 #define SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE   (1)
diff --git a/components/soc/esp32p4/include/soc/uart_pins.h b/components/soc/esp32p4/include/soc/uart_pins.h
index a06e11928e9..3c23e514ace 100644
--- a/components/soc/esp32p4/include/soc/uart_pins.h
+++ b/components/soc/esp32p4/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 38
 #define U0TXD_GPIO_NUM 37
@@ -53,18 +51,18 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_GPIO37_UART0_TXD_PAD)
-#define U0RXD_MUX_FUNC  (FUNC_GPIO38_UART0_RXD_PAD)
-#define U0RTS_MUX_FUNC  (FUNC_GPIO8_UART0_RTS_PAD)
-#define U0CTS_MUX_FUNC  (FUNC_GPIO9_UART0_CTS_PAD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
+#define U0RTS_MUX_FUNC  (2)
+#define U0CTS_MUX_FUNC  (2)
 #define U0DTR_MUX_FUNC  (-1)
 #define U0DSR_MUX_FUNC  (-1)
 
 /* Same goes for UART1 */
-#define U1TXD_MUX_FUNC  (FUNC_GPIO10_UART1_TXD_PAD)
-#define U1RXD_MUX_FUNC  (FUNC_GPIO11_UART1_RXD_PAD)
-#define U1RTS_MUX_FUNC  (FUNC_GPIO12_UART1_RTS_PAD)
-#define U1CTS_MUX_FUNC  (FUNC_GPIO13_UART1_CTS_PAD)
+#define U1TXD_MUX_FUNC  (2)
+#define U1RXD_MUX_FUNC  (2)
+#define U1RTS_MUX_FUNC  (2)
+#define U1CTS_MUX_FUNC  (2)
 #define U1DTR_MUX_FUNC  (-1)
 #define U1DSR_MUX_FUNC  (-1)
 
diff --git a/components/soc/esp32s2/include/soc/uart_pins.h b/components/soc/esp32s2/include/soc/uart_pins.h
index fce45d00d87..881b085246d 100644
--- a/components/soc/esp32s2/include/soc/uart_pins.h
+++ b/components/soc/esp32s2/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM  (44)
 #define U0TXD_GPIO_NUM  (43)
@@ -25,16 +23,16 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
-#define U0RTS_MUX_FUNC  (FUNC_XTAL_32K_P_U0RTS)
-#define U0CTS_MUX_FUNC  (FUNC_XTAL_32K_N_U0CTS)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
+#define U0RTS_MUX_FUNC  (2)
+#define U0CTS_MUX_FUNC  (2)
 #define U0DTR_MUX_FUNC  (-1)
 #define U0DSR_MUX_FUNC  (-1)
 
-#define U1TXD_MUX_FUNC  (FUNC_DAC_1_U1TXD)
-#define U1RXD_MUX_FUNC  (FUNC_DAC_2_U1RXD)
-#define U1RTS_MUX_FUNC  (FUNC_GPIO19_U1RTS)
-#define U1CTS_MUX_FUNC  (FUNC_GPIO20_U1CTS)
+#define U1TXD_MUX_FUNC  (2)
+#define U1RXD_MUX_FUNC  (2)
+#define U1RTS_MUX_FUNC  (2)
+#define U1CTS_MUX_FUNC  (2)
 #define U1DTR_MUX_FUNC  (-1)
 #define U1DSR_MUX_FUNC  (-1)
diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
index 2f44fa1cc53..7f27bc24857 100644
--- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
@@ -819,10 +819,6 @@ config SOC_UART_BITRATE_MAX
     int
     default 5000000
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h
index 75ea764374b..cdf344de9c0 100644
--- a/components/soc/esp32s3/include/soc/soc_caps.h
+++ b/components/soc/esp32s3/include/soc/soc_caps.h
@@ -341,8 +341,6 @@
 #define SOC_UART_HP_NUM             (3)
 #define SOC_UART_FIFO_LEN           (128)      /*!< The UART hardware FIFO length */
 #define SOC_UART_BITRATE_MAX        (5000000)  /*!< Max bit rate supported by UART */
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
 #define SOC_UART_SUPPORT_WAKEUP_INT (1)        /*!< Support UART wakeup interrupt */
 #define SOC_UART_SUPPORT_APB_CLK    (1)     /*!< Support APB as the clock source */
 #define SOC_UART_SUPPORT_RTC_CLK    (1)     /*!< Support RTC clock as the clock source */
diff --git a/components/soc/esp32s3/include/soc/uart_pins.h b/components/soc/esp32s3/include/soc/uart_pins.h
index d1a3f820230..f16d1adaadd 100644
--- a/components/soc/esp32s3/include/soc/uart_pins.h
+++ b/components/soc/esp32s3/include/soc/uart_pins.h
@@ -6,8 +6,6 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 44
 #define U0TXD_GPIO_NUM 43
@@ -32,17 +30,17 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_U0TXD_U0TXD)
-#define U0RXD_MUX_FUNC  (FUNC_U0RXD_U0RXD)
-#define U0RTS_MUX_FUNC  (FUNC_XTAL_32K_P_U0RTS)
-#define U0CTS_MUX_FUNC  (FUNC_XTAL_32K_N_U0CTS)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
+#define U0RTS_MUX_FUNC  (2)
+#define U0CTS_MUX_FUNC  (2)
 #define U0DTR_MUX_FUNC  (-1)
 #define U0DSR_MUX_FUNC  (-1)
 
-#define U1TXD_MUX_FUNC  (FUNC_DAC_1_U1TXD)
-#define U1RXD_MUX_FUNC  (FUNC_DAC_2_U1RXD)
-#define U1RTS_MUX_FUNC  (FUNC_GPIO19_U1RTS)
-#define U1CTS_MUX_FUNC  (FUNC_GPIO20_U1CTS)
+#define U1TXD_MUX_FUNC  (2)
+#define U1RXD_MUX_FUNC  (2)
+#define U1RTS_MUX_FUNC  (2)
+#define U1CTS_MUX_FUNC  (2)
 #define U1DTR_MUX_FUNC  (-1)
 #define U1DSR_MUX_FUNC  (-1)
 
diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
index 7903e63ef8d..161f50ede5b 100644
--- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
@@ -343,10 +343,6 @@ config SOC_UART_BITRATE_MAX
     int
     default 5000000
 
-config SOC_UART_SUPPORT_PLL_F80M_CLK
-    bool
-    default y
-
 config SOC_UART_SUPPORT_RTC_CLK
     bool
     default y
@@ -359,10 +355,6 @@ config SOC_UART_SUPPORT_WAKEUP_INT
     bool
     default y
 
-config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
-    bool
-    default y
-
 config SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN
     int
     default 5
diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h
index cfe0c31a64c..8589f6bae1d 100644
--- a/components/soc/esp32s31/include/soc/soc_caps.h
+++ b/components/soc/esp32s31/include/soc/soc_caps.h
@@ -243,16 +243,12 @@
 #define SOC_UART_FIFO_LEN               (128)       /*!< The UART hardware FIFO length */
 #define SOC_LP_UART_FIFO_LEN            (16)        /*!< The LP UART hardware FIFO length */
 #define SOC_UART_BITRATE_MAX            (5000000)   /*!< Max bit rate supported by UART */
-#define SOC_UART_SUPPORT_PLL_F80M_CLK   (1)         /*!< Support PLL_F80M as the clock source */
 #define SOC_UART_SUPPORT_RTC_CLK        (1)         /*!< Support RTC clock as the clock source */
 #define SOC_UART_SUPPORT_XTAL_CLK       (1)         /*!< Support XTAL clock as the clock source */
 #define SOC_UART_SUPPORT_WAKEUP_INT     (1)         /*!< Support UART wakeup interrupt */
 // #define SOC_UART_HAS_LP_UART            (1)         /*!< Support LP UART */
 // #define SOC_UART_SUPPORT_SLEEP_RETENTION   (1)      /*!< Support back up registers before sleep */
 
-// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
-#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND   (1)
-
 #define SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN 5
 #define SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE (1)
 
diff --git a/components/soc/esp32s31/include/soc/uart_pins.h b/components/soc/esp32s31/include/soc/uart_pins.h
index 9cd15445b2e..14db90dbb41 100644
--- a/components/soc/esp32s31/include/soc/uart_pins.h
+++ b/components/soc/esp32s31/include/soc/uart_pins.h
@@ -6,18 +6,15 @@
 
 #pragma once
 
-#include "soc/io_mux_reg.h"
-
 // TODO: to be checked IDF-14789
 
-/* Specify the number of pins for UART */
-#define SOC_UART_PINS_COUNT  (4)
-
 /* Specify the GPIO pin number for each UART signal in the IOMUX */
 #define U0RXD_GPIO_NUM 59
 #define U0TXD_GPIO_NUM 58
 #define U0RTS_GPIO_NUM (-1)
 #define U0CTS_GPIO_NUM (-1)
+// DTR
+// DSR
 
 #define U1RXD_GPIO_NUM (-1)
 #define U1TXD_GPIO_NUM (-1)
@@ -46,18 +43,16 @@
 
 /* The following defines are necessary for reconfiguring the UART
  * to use IOMUX, at runtime. */
-#define U0TXD_MUX_FUNC  (FUNC_GPIO58_UART0_TXD_PAD)
-#define U0RXD_MUX_FUNC  (FUNC_GPIO59_UART0_RXD_PAD)
+#define U0TXD_MUX_FUNC  (0)
+#define U0RXD_MUX_FUNC  (0)
 #define U0RTS_MUX_FUNC  (-1)
 #define U0CTS_MUX_FUNC  (-1)
 
-/* Same goes for UART1 */
 #define U1TXD_MUX_FUNC  (-1)
 #define U1RXD_MUX_FUNC  (-1)
 #define U1RTS_MUX_FUNC  (-1)
 #define U1CTS_MUX_FUNC  (-1)
 
-/* No func for the following pins, they shall not be used */
 #define U2TXD_MUX_FUNC  (-1)
 #define U2RXD_MUX_FUNC  (-1)
 #define U2RTS_MUX_FUNC  (-1)
diff --git a/components/soc/linux/include/soc/uart_channel.h b/components/soc/linux/include/soc/uart_pins.h
similarity index 100%
rename from components/soc/linux/include/soc/uart_channel.h
rename to components/soc/linux/include/soc/uart_pins.h
diff --git a/docs/en/api-reference/peripherals/uart.rst b/docs/en/api-reference/peripherals/uart.rst
index 22316ff24a4..6f684a34de9 100644
--- a/docs/en/api-reference/peripherals/uart.rst
+++ b/docs/en/api-reference/peripherals/uart.rst
@@ -445,6 +445,6 @@ API Reference
 GPIO Lookup Macros
 ^^^^^^^^^^^^^^^^^^
 
-Some UART ports have dedicated IO_MUX pins to which they are connected directly. These can be useful if you need very high UART baud rates, which means you will have to use IO_MUX pins only. In other cases, any GPIO pin can be used for UART communication by routing the signals through the GPIO matrix. If the UART port has dedicated IO_MUX pins, :c:macro:`UART_NUM_x_TXD_DIRECT_GPIO_NUM` and :c:macro:`UART_NUM_x_RXD_DIRECT_GPIO_NUM` can be used to find the corresponding IO_MUX pin numbers.
+Some UART ports have dedicated IO_MUX pins to which they are connected directly. These can be useful if you need very high UART baud rates, which means you will have to use IO_MUX pins only. In other cases, any GPIO pin can be used for UART communication by routing the signals through the GPIO matrix. If the UART port has dedicated IO_MUX pins, :c:macro:`UxTXD_GPIO_NUM` and :c:macro:`UxRXD_GPIO_NUM` can be used to find the corresponding IO_MUX pin numbers.
 
-.. include-build-file:: inc/uart_channel.inc
+.. include-build-file:: inc/uart_pins.inc
diff --git a/docs/zh_CN/api-reference/peripherals/uart.rst b/docs/zh_CN/api-reference/peripherals/uart.rst
index e351eeb184d..aaa3f454965 100644
--- a/docs/zh_CN/api-reference/peripherals/uart.rst
+++ b/docs/zh_CN/api-reference/peripherals/uart.rst
@@ -445,6 +445,6 @@ API 参考
 GPIO 查找宏指令
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-一些 UART 外设有供直接连接的专用 IO_MUX 管脚。这些管脚可用于需要极高 UART 波特率的场景，即仅可使用 IO_MUX 管脚。在其他情况下，任一 GPIO 管脚都可用于 UART 通信，只需将信号通过 GPIO 矩阵路由即可。当特定的 UART 外设有专用 IO_MUX 管脚时，:c:macro:`UART_NUM_x_TXD_DIRECT_GPIO_NUM` 和 :c:macro:`UART_NUM_x_RXD_DIRECT_GPIO_NUM` 可用于查找对应的 IO_MUX 管脚编号。
+一些 UART 外设有供直接连接的专用 IO_MUX 管脚。这些管脚可用于需要极高 UART 波特率的场景，即仅可使用 IO_MUX 管脚。在其他情况下，任一 GPIO 管脚都可用于 UART 通信，只需将信号通过 GPIO 矩阵路由即可。当特定的 UART 外设有专用 IO_MUX 管脚时，:c:macro:`UxTXD_GPIO_NUM` 和 :c:macro:`UxRXD_GPIO_NUM` 可用于查找对应的 IO_MUX 管脚编号。
 
-.. include-build-file:: inc/uart_channel.inc
+.. include-build-file:: inc/uart_pins.inc