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Merge branch 'feat/usb-explicit-fifo-config_v5.4' into 'release/v5.4'
feat(usb/hal): Add HAL API to configure custom FIFO layout (backport v5.4) See merge request espressif/esp-idf!39265
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@@ -178,7 +178,6 @@ hcd_port_handle_t test_hcd_setup(void)
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TEST_ASSERT_EQUAL(ESP_OK, hcd_install(&hcd_config));
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// Initialize a port
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hcd_port_config_t port_config = {
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.fifo_bias = HCD_PORT_FIFO_BIAS_BALANCED,
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.callback = port_callback,
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.callback_arg = (void *)port_evt_queue,
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.context = (void *)port_evt_queue,
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@@ -43,7 +43,6 @@ TEST_CASE("Test HCD isochronous pipe URBs", "[isoc][full_speed][high_speed]")
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{
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usb_speed_t port_speed = test_hcd_wait_for_conn(port_hdl); // Trigger a connection
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// The MPS of the ISOC OUT pipe is quite large, so we need to bias the FIFO sizing
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TEST_ASSERT_EQUAL(ESP_OK, hcd_port_set_fifo_bias(port_hdl, HCD_PORT_FIFO_BIAS_PTX));
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vTaskDelay(pdMS_TO_TICKS(100)); // Short delay send of SOF (for FS) or EOPs (for LS)
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// Enumerate and reset device
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@@ -118,7 +117,6 @@ TEST_CASE("Test HCD isochronous pipe URBs all", "[isoc][full_speed][high_speed]"
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{
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usb_speed_t port_speed = test_hcd_wait_for_conn(port_hdl); // Trigger a connection
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// The MPS of the ISOC OUT pipe is quite large, so we need to bias the FIFO sizing
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TEST_ASSERT_EQUAL(ESP_OK, hcd_port_set_fifo_bias(port_hdl, HCD_PORT_FIFO_BIAS_PTX));
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vTaskDelay(pdMS_TO_TICKS(100)); // Short delay send of SOF (for FS) or EOPs (for LS)
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// Enumerate and reset device
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@@ -230,7 +228,6 @@ TEST_CASE("Test HCD isochronous pipe sudden disconnect", "[isoc][full_speed][hig
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{
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usb_speed_t port_speed = test_hcd_wait_for_conn(port_hdl); // Trigger a connection
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// The MPS of the ISOC OUT pipe is quite large, so we need to bias the FIFO sizing
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TEST_ASSERT_EQUAL(ESP_OK, hcd_port_set_fifo_bias(port_hdl, HCD_PORT_FIFO_BIAS_PTX));
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vTaskDelay(pdMS_TO_TICKS(100)); // Short delay send of SOF (for FS) or EOPs (for LS)
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// Enumerate and reset device
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