mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
fix(esp_system): xtensa: refactor linker scripts and reduce binary size for C++ apps
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@@ -141,9 +141,6 @@ _heap_end = ALIGN(0x40000000 - _sram1_iram_len - 3, 4);
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_heap_end = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
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#endif
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_data_seg_org = ORIGIN(rtc_data_seg);
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/* The lines below define location alias for .rtc.data section based on Kconfig option.
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When the option is not defined then use slow memory segment
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else the data will be placed in fast memory segment */
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@@ -19,7 +19,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _rtc_text_start)
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mapping[rtc_text]
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SECTION_MAPPINGS(rtc_text)
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*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
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@@ -49,7 +49,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _rtc_force_fast_start)
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mapping[rtc_force_fast]
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SECTION_MAPPINGS(rtc_force_fast)
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*(.rtc.force_fast .rtc.force_fast.*)
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@@ -68,7 +68,7 @@ SECTIONS
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{
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_rtc_data_start = ABSOLUTE(.);
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mapping[rtc_data]
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SECTION_MAPPINGS(rtc_data)
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.*)
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@@ -83,7 +83,7 @@ SECTIONS
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*rtc_wake_stub*.*(.bss .bss.*)
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*rtc_wake_stub*.*(COMMON)
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mapping[rtc_bss]
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SECTION_MAPPINGS(rtc_bss)
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_data_location
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@@ -100,6 +100,8 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _rtc_noinit_start)
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SECTION_MAPPINGS(rtc_noinit)
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*(.rtc_noinit .rtc_noinit.*)
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ALIGNED_SYMBOL(4, _rtc_noinit_end)
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@@ -222,8 +224,7 @@ SECTIONS
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/* Code marked as running out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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mapping[iram0_text]
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SECTION_MAPPINGS(iram0_text)
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} > iram0_0_seg
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.dram0.data :
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@@ -237,7 +238,7 @@ SECTIONS
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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mapping[dram0_data]
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SECTION_MAPPINGS(dram0_data)
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_data_end = ABSOLUTE(.);
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} > dram0_0_seg
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@@ -250,6 +251,7 @@ SECTIONS
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{
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_ext_ram_noinit_start = ABSOLUTE(.);
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SECTION_MAPPINGS(extram_noinit)
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*(.ext_ram_noinit*)
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ALIGNED_SYMBOL(4, _ext_ram_noinit_end)
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@@ -275,7 +277,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _ext_ram_bss_start)
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mapping[extern_ram]
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SECTION_MAPPINGS(extern_ram)
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ALIGNED_SYMBOL(4, _ext_ram_bss_end)
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} > extern_ram_seg
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@@ -285,11 +287,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(8, _bss_start)
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/**
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* ldgen places all bss-related data to mapping[dram0_bss]
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* (See components/esp_system/app.lf).
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*/
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mapping[dram0_bss]
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SECTION_MAPPINGS(dram0_bss)
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ALIGNED_SYMBOL(8, _bss_end)
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} > dram0_0_seg
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@@ -326,7 +324,7 @@ SECTIONS
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{
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_flash_rodata_start = ABSOLUTE(.);
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mapping[flash_rodata]
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SECTION_MAPPINGS(flash_rodata)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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@@ -344,16 +342,6 @@ SECTIONS
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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#if EH_FRAME_LINKING_ENABLED
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ALIGNED_SYMBOL(4, __eh_frame)
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KEEP(*(.eh_frame))
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/**
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* As we are not linking with crtend.o, which includes the CIE terminator
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* (see __FRAME_END__ in libgcc sources), it is manually provided here.
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*/
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LONG(0);
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#endif // EH_FRAME_LINKING_ENABLED
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/**
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* C++ constructor tables.
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*
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@@ -381,9 +369,37 @@ SECTIONS
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(ALIGNOF(SECTION_AFTER_FLASH_RODATA));
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} > default_rodata_seg
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ASSERT_SECTIONS_GAP(.flash.rodata, SECTION_AFTER_FLASH_RODATA)
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/* TLS data. */
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ALIGNED_SYMBOL(4, _thread_local_start)
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#if EH_FRAME_LINKING_ENABLED
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.eh_frame :
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{
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ALIGNED_SYMBOL(4, __eh_frame)
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KEEP (*(.eh_frame))
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/**
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* As we are not linking with crtend.o, which includes the CIE terminator
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* (see __FRAME_END__ in libgcc sources), it is manually provided here.
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*/
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LONG(0);
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__eh_frame_end = ABSOLUTE(.);
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. = ALIGN(ALIGNOF(.flash.tdata));
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} > default_rodata_seg
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#endif // EH_FRAME_LINKING_ENABLED
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.flash.tdata :
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{
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/* Keep tdata and tbss sections contiguous (no gaps between them).
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* The TLS runtime code calculates offsets assuming these sections are
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* adjacent. Gaps would cause incorrect address calculations, leading
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* to accessing wrong memory.
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*/
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/* tdata sections */
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_thread_local_data_start = ABSOLUTE(.);
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#if CONFIG_LIBC_PICOLIBC
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_picolibc_reent_stub_start = ABSOLUTE(.);
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KEEP(*(.tdata.errno))
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@@ -395,15 +411,18 @@ SECTIONS
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#endif // CONFIG_LIBC_PICOLIBC_NEWLIB_COMPATIBILITY
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_picolibc_reent_stub_end = ABSOLUTE(.);
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#endif // CONFIG_LIBC_PICOLIBC
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*(.tdata)
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*(.tdata.*)
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*(.tbss)
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*(.tbss.*)
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_thread_local_end = ABSOLUTE(.);
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*(.tdata .tdata.* .gnu.linkonce.td.*)
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_thread_local_data_end = ABSOLUTE(.);
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/* tbss sections */
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_thread_local_bss_start = ABSOLUTE(.);
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*(.tbss .tbss.* .gnu.linkonce.tb.*)
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*(.tcommon .tcommon.*)
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_thread_local_bss_end = ABSOLUTE(.);
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} > default_rodata_seg
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_tls_section_alignment = ALIGNOF(.flash.tdata);
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ASSERT_PICOLIBC_REENT_STUB()
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_flash_rodata_align = ALIGNOF(.flash.rodata);
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ASSERT(_thread_local_data_end == _thread_local_bss_start,
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"tdata and tbss must be contiguous.")
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/**
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* This section contains all the rodata that is not used
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@@ -418,7 +437,7 @@ SECTIONS
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*/
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_rodata_reserved_end = ABSOLUTE(.);
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mapping[rodata_noload]
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SECTION_MAPPINGS(rodata_noload)
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} > default_rodata_seg
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.flash.text :
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@@ -431,7 +450,7 @@ SECTIONS
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_instruction_reserved_start = ABSOLUTE(.);
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_text_start = ABSOLUTE(.);
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mapping[flash_text]
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SECTION_MAPPINGS(flash_text)
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*(.stub)
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*(.gnu.warning)
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@@ -472,7 +491,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _iram_data_start)
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mapping[iram0_data]
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SECTION_MAPPINGS(iram0_data)
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_iram_data_end = ABSOLUTE(.);
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} > iram0_0_seg
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@@ -481,7 +500,7 @@ SECTIONS
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{
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ALIGNED_SYMBOL(4, _iram_bss_start)
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mapping[iram0_bss]
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SECTION_MAPPINGS(iram0_bss)
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_iram_bss_end = ABSOLUTE(.);
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ALIGNED_SYMBOL(4, _iram_end)
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@@ -494,7 +513,8 @@ SECTIONS
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ALIGNED_SYMBOL(8, _heap_low_start)
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} > dram0_0_seg
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#include "elf_misc.ld.in"
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#include "ld.debug.sections"
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#include "ld.discard.sections"
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}
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ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
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