mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 10:40:47 +03:00
fix(uart): fix uart sw flow ctrl XOFF char write to wrong reg on ESP32C6
Add software flow control test case
Introduced in e6ef4d1791
Closes https://github.com/espressif/esp-idf/issues/18779
This commit is contained in:
@@ -14,7 +14,7 @@ endif()
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# the component can be registered as WHOLE_ARCHIVE
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idf_component_register(
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SRCS ${srcs}
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REQUIRES esp_driver_uart unity esp_psram test_utils esp_driver_gpio esp_pm
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REQUIRES esp_driver_uart unity esp_psram test_utils esp_driver_gpio esp_pm esp_timer
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PRIV_INCLUDE_DIRS .
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WHOLE_ARCHIVE
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)
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -16,11 +16,13 @@
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#include "driver/rtc_io.h"
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#include "hal/rtc_io_ll.h"
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#endif
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#include "hal/uart_ll.h"
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#include "soc/uart_periph.h"
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#include "soc/uart_pins.h"
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#include "soc/soc_caps.h"
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#include "soc/clk_tree_defs.h"
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#include "test_common.h"
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#include "esp_timer.h"
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#define BUF_SIZE (100)
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#define UART_BAUD_11520 (11520)
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@@ -636,3 +638,211 @@ TEST_CASE("uart in one-wire mode", "[uart]")
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TEST_ESP_OK(uart_driver_delete(uart_num));
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}
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// XON/XOFF software flow control characters (must match the ones the driver programs into the hardware)
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#define TEST_UART_XON_CHAR (0x11)
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#define TEST_UART_XOFF_CHAR (0x13)
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// A small, fixed amount of payload written to the UART to probe whether the transmitter is draining it.
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// Kept well within the smallest HW TX FIFO (the LP UART has only 16 bytes) so the write always fits and, since
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// the FIFO is empty at every call site, uart_write_bytes() never blocks waiting for FIFO space.
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#define TEST_UART_TX_PROBE_BYTES (8)
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// The probe window: a running transmitter drains TEST_UART_TX_PROBE_BYTES in well under 1 ms at any reasonable
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// baud rate, so 100 ms is plenty to tell "draining" (tx goes idle) from "paused" (tx never goes idle).
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#define TEST_UART_TX_PROBE_WINDOW_MS (100)
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// Queue a fixed chunk of payload through the driver's TX path (installed with no TX ring buffer, so the bytes
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// go straight to the HW TX FIFO). The payload byte must differ from XON/XOFF; its value is irrelevant to the
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// local TX flow control decision.
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static void test_uart_write_txfifo_probe(uart_port_t uart_num)
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{
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uint8_t payload[TEST_UART_TX_PROBE_BYTES];
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memset(payload, 0x55, sizeof(payload));
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uart_write_bytes(uart_num, payload, sizeof(payload));
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}
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// Return true once TX has stopped draining (i.e. an XOFF was received and the transmitter paused).
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// Each iteration queues a small probe into the (empty) FIFO and waits for the transmitter to go idle: if it
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// cannot finish within the probe window the transmitter is paused. Otherwise it drained the probe (running),
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// leaving the FIFO empty again for the next iteration.
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static bool test_uart_wait_tx_paused(uart_port_t uart_num, int timeout_ms)
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{
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int64_t deadline = esp_timer_get_time() + (int64_t)timeout_ms * 1000;
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while (esp_timer_get_time() < deadline) {
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test_uart_write_txfifo_probe(uart_num);
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if (uart_wait_tx_done(uart_num, pdMS_TO_TICKS(TEST_UART_TX_PROBE_WINDOW_MS)) == ESP_ERR_TIMEOUT) {
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return true; // probe could not drain -> paused
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}
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}
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return false;
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}
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// Return true once TX starts draining again (i.e. an XON was received and the transmitter resumed).
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// The probe bytes queued by the pause step are still sitting in the FIFO (nothing drains while paused), so we
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// just wait for the transmitter to finally go idle, which only happens once it resumes and shifts them out.
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static bool test_uart_wait_tx_resumed(uart_port_t uart_num, int timeout_ms)
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{
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int64_t deadline = esp_timer_get_time() + (int64_t)timeout_ms * 1000;
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while (esp_timer_get_time() < deadline) {
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if (uart_wait_tx_done(uart_num, pdMS_TO_TICKS(TEST_UART_TX_PROBE_WINDOW_MS)) == ESP_OK) {
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return true; // FIFO drained -> resumed
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}
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}
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return false;
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}
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// Wait until the RX FIFO has accumulated more than the XOFF threshold (so an XOFF should have been sent).
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static bool test_uart_wait_rxfifo_filled(uart_dev_t *hw, uint32_t xoff_thresh, int timeout_ms)
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{
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int64_t deadline = esp_timer_get_time() + (int64_t)timeout_ms * 1000;
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while (esp_timer_get_time() < deadline) {
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if (uart_ll_get_rxfifo_len(hw) > xoff_thresh) {
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return true;
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}
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vTaskDelay(pdMS_TO_TICKS(5));
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}
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return false;
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}
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// Drain the whole HW RX FIFO directly (the driver's RX interrupts are disabled), dropping the level below the
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// XON threshold so the hardware sends an XON.
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static void test_uart_drain_rxfifo(uart_dev_t *hw)
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{
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uint8_t buf[64];
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uint32_t len;
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while ((len = uart_ll_get_rxfifo_len(hw)) > 0) {
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if (len > sizeof(buf)) {
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len = sizeof(buf);
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}
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uart_ll_read_rxfifo(hw, buf, len);
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}
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}
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/*
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* This test verifies both directions of the UART hardware software-flow-control (XON/XOFF) feature:
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* 1. Receiving flow control: once the UART receives an XOFF character it must stop transmitting, and resume
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* once it receives an XON character.
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* 2. Sending flow control: once the RX FIFO fills past the XOFF threshold the UART must transmit an XOFF
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* character, and once it is drained below the XON threshold it must transmit an XON character.
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*
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* For the HP UART port, the test taps the UART RX onto the console UART RX pad so the host (pytest) can inject
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* XON/XOFF (direction 1) over the very same serial connection it already uses to talk to the console, without
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* extra wiring. For direction 2, the console TX pad is temporarily re-routed to the UART TX signal so the host
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* can observe the XON/XOFF characters the UART sends. The console UART RX pad is a regular (HP) GPIO though,
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* while the LP UART can only use LP-capable (RTC) GPIOs, so it cannot borrow the console pads. Hence for the LP
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* UART port the test keeps the LP UART on its normal pins and a manual tester is expected to physically wire
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* the console/UART0 RX and TX lines to them. (CI only exercises HP UART.)
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*
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* The UART TX shifts data out at the configured baud rate regardless of where it is routed, so direction 1 is
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* observed on the DUT by watching the HW TX FIFO drain.
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*/
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TEST_CASE("uart software flow control (XON/XOFF)", "[uart_flow_ctrl]")
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{
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uart_port_param_t port_param = {};
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TEST_ASSERT(port_select(&port_param));
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uart_port_t uart_num = port_param.port_num;
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uart_dev_t *hw = UART_LL_GET_HW(uart_num);
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const bool is_hp_uart = (uart_num < SOC_UART_HP_NUM);
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printf("Note that if you are in any terminal program, likely the XON/XOFF will be trapped by the shell. Run 'stty -ixon -ixoff' to let the keys pass through your terminal application!\n");
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int rx_pin, tx_pin;
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if (is_hp_uart) {
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// HP UART: tap the UART RX onto the console UART RX pad so the host can inject XON/XOFF over the console.
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// The TX is left unrouted for now; it is hijacked onto the console TX pad later for the sending direction.
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rx_pin = uart_periph_signal[CONFIG_CONSOLE_UART_NUM].pins[SOC_UART_RX_PIN_IDX].default_gpio;
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TEST_ASSERT(rx_pin >= 0);
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tx_pin = UART_PIN_NO_CHANGE;
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} else {
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// LP UART: keep both pins on their normal IOs; a manual tester wires the console/UART0 lines to them.
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printf("LP UART needs manual wiring of console UART lines to the UART pins (TX-to-RX, RX-to-TX)\n");
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rx_pin = port_param.rx_pin_num;
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tx_pin = port_param.tx_pin_num;
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}
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uart_config_t uart_config = {
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.baud_rate = 115200,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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.source_clk = port_param.default_src_clk,
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};
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// No TX ring buffer: the direct FIFO writes below go straight to the HW TX FIFO, so monitoring the FIFO
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// level reflects the real transmitter state.
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TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 0, NULL, 0));
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TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
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TEST_ESP_OK(uart_set_pin(uart_num, tx_pin, rx_pin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
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// RX FIFO thresholds and fill size that drive the *sending* direction (part 2). They must fit the HW FIFO,
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// which is much smaller on the LP UART (16 bytes) than on the HP UART (128 bytes).
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// - xoff_thresh: when the RX FIFO rises above this, the hardware sends XOFF
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// - xon_thresh: when the RX FIFO drops below this, the hardware sends XON
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// - fill_bytes: amount the host sends, chosen > xoff_thresh and <= HW FIFO length (so no overflow)
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int xon_thresh, xoff_thresh, fill_bytes;
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if (is_hp_uart) {
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xon_thresh = 10;
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xoff_thresh = 40;
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fill_bytes = 64;
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} else {
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xon_thresh = 2;
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xoff_thresh = 8;
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fill_bytes = 12;
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}
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// Enable software flow control with the thresholds above.
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TEST_ESP_OK(uart_set_sw_flow_ctrl(uart_num, true, xon_thresh, xoff_thresh));
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// ---- Part 1: receiving XON/XOFF pauses / resumes the transmitter ----
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printf("\n");
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printf("Send %#04x (XOFF - Ctrl+S) to stop UART transmission\n", TEST_UART_XOFF_CHAR);
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bool paused = test_uart_wait_tx_paused(uart_num, 20000);
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TEST_ASSERT_MESSAGE(paused, "UART transmitter did not pause after receiving XOFF");
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printf("UART transmission stopped\n");
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printf("Send %#04x (XON - Ctrl+Q) to start UART transmission\n", TEST_UART_XON_CHAR);
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bool resumed = test_uart_wait_tx_resumed(uart_num, 20000);
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TEST_ASSERT_MESSAGE(resumed, "UART transmitter did not resume after receiving XON");
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printf("UART transmission resumed\n");
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// Part 1 left the transmitter idle (uart_wait_tx_done returned OK); reset the TX FIFO anyway to guarantee a
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// clean slate before observing the auto XON/XOFF.
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uart_ll_txfifo_rst(hw);
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// ---- Part 2: filling / draining the RX FIFO makes the UART send XOFF / XON ----
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// Disable the driver's RX interrupts so the RX FIFO is not auto-drained; we drain it explicitly below. This
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// guarantees the XOFF is sent (FIFO stays above the XOFF threshold) before we drop it below the XON threshold.
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TEST_ESP_OK(uart_disable_rx_intr(uart_num));
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uart_ll_rxfifo_rst(hw);
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printf("\n");
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printf("Send %d bytes to fill RX FIFO\n", fill_bytes);
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fflush(stdout);
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const int console_tx_pin = uart_periph_signal[CONFIG_CONSOLE_UART_NUM].pins[SOC_UART_TX_PIN_IDX].default_gpio;
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const int console_tx_signal = uart_periph_signal[CONFIG_CONSOLE_UART_NUM].pins[SOC_UART_TX_PIN_IDX].signal;
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const int uart_tx_signal = uart_periph_signal[uart_num].pins[SOC_UART_TX_PIN_IDX].signal;
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if (is_hp_uart) {
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// Make sure the prompt is fully sent, then hijack the console TX pad so the host reads the UART's TX.
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uart_wait_tx_idle_polling(CONFIG_CONSOLE_UART_NUM);
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gpio_func_sel(console_tx_pin, PIN_FUNC_GPIO);
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esp_rom_gpio_connect_out_signal(console_tx_pin, uart_tx_signal, false, false);
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}
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bool filled = test_uart_wait_rxfifo_filled(hw, xoff_thresh, 20000); // by now an XOFF should have been sent
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test_uart_drain_rxfifo(hw); // dropping below XON threshold sends XON
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uart_wait_tx_idle_polling(uart_num); // let the XON finish transmitting
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vTaskDelay(pdMS_TO_TICKS(10));
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if (is_hp_uart) {
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// Restore the console TX pad so the unity test result can be reported over the console again.
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esp_rom_gpio_connect_out_signal(console_tx_pin, console_tx_signal, false, false);
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}
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TEST_ASSERT_MESSAGE(filled, "RX FIFO was not filled past the XOFF threshold by the host");
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printf("Please manually read the TX signal to confirm that it actually sent XOFF and XON characters\n");
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TEST_ESP_OK(uart_set_sw_flow_ctrl(uart_num, false, 0, 0));
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TEST_ESP_OK(uart_driver_delete(uart_num));
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}
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@@ -17,6 +17,38 @@ input_argv = {
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}
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def _run_uart_flow_ctrl_case(dut, case) -> None: # type: ignore
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# Only the HP UART port is exercised in CI: its RX/TX borrow the console UART RX/TX pads, so the
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# host can inject and observe the XON (0x11) / XOFF (0x13) characters over the console connection
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# without extra wiring. The LP UART port cannot borrow the console pads (LP-only GPIOs) and would
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# need UART0 to be physically wired to the LP UART pins, so it is left for manual testing only.
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dut.serial.hard_reset()
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dut._get_ready()
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dut.confirm_write(case.index, expect_str=f'Running {case.name}...')
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dut.expect("select to test 'uart' or 'lp_uart' port", timeout=10)
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dut.write('uart')
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# Drive the HP UART software-flow-control case (both directions) after the 'uart' port has been selected.
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# Part 1: the DUT reacts to XON/XOFF that we inject over the console connection.
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dut.expect_exact('Send 0x13 (XOFF - Ctrl+S) to stop UART transmission', timeout=10)
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dut.write(b'\x13')
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dut.expect_exact('UART transmission stopped', timeout=25)
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dut.expect_exact('Send 0x11 (XON - Ctrl+Q) to start UART transmission', timeout=10)
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dut.write(b'\x11')
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dut.expect_exact('UART transmission resumed', timeout=25)
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# Part 2: the DUT auto-sends XOFF/XON when its RX FIFO fills/drains. It temporarily borrows the console TX
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# pad, so we read the raw XOFF (0x13) then XON (0x11) bytes back over the console connection.
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dut.expect_exact('Send 64 bytes to fill RX FIFO', timeout=10)
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dut.write(b'A' * 64)
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dut.expect(b'\x13') # XOFF
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dut.expect(b'\x11') # XON
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dut.expect_unity_test_output()
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@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='skip due to duplication with test_uart_single_dev_psram')
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@pytest.mark.generic
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@pytest.mark.parametrize(
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@@ -36,6 +68,10 @@ def test_uart_single_dev(case_tester) -> None: # type: ignore
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assert uart_ports, f"Error: Chip type '{chip_type}' is not defined in input_argv. Aborting..."
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for case in case_tester.test_menu:
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if 'uart_flow_ctrl' in case.groups:
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_run_uart_flow_ctrl_case(dut, case)
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continue
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if 'hp-uart-only' not in case.groups:
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for uart_port in uart_ports:
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dut.serial.hard_reset()
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@@ -62,6 +98,10 @@ def test_uart_single_dev(case_tester) -> None: # type: ignore
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def test_uart_single_dev_psram(case_tester) -> None: # type: ignore
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dut = case_tester.first_dut
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for case in case_tester.test_menu:
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if 'uart_flow_ctrl' in case.groups:
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_run_uart_flow_ctrl_case(dut, case)
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continue
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dut.serial.hard_reset()
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dut._get_ready()
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dut.confirm_write(case.index, expect_str=f'Running {case.name}...')
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Block a user