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Merge branch 'fix/gen_soc_caps_v5.4' into 'release/v5.4'

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change: config options of the same name must have the same type (v5.4)

See merge request espressif/esp-idf!39570
This commit is contained in:
Roland Dobai
2025-06-28 05:24:48 +02:00
parent 66a5a5884f 421f499317
commit dde432d135
9 changed files with 143 additions and 89 deletions
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components/soc/esp32/include/soc/Kconfig.soc_caps.in
+10 -18
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@@ -3,18 +3,6 @@
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config SOC_BROWNOUT_RESET_SUPPORTED
string
default "Not determined"
config SOC_TWAI_BRP_DIV_SUPPORTED
string
default "Not determined"
config SOC_DPORT_WORKAROUND
string
default "Not determined"
config SOC_CAPS_ECO_VER_MAX
int
default 301
@@ -279,6 +267,10 @@ config SOC_ADC_SHARED_POWER
bool
default y
config SOC_BROWNOUT_RESET_SUPPORTED
bool
default y
config SOC_SHARED_IDCACHE_SUPPORTED
bool
default y
@@ -312,8 +304,8 @@ config SOC_CPU_WATCHPOINTS_NUM
default 2
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64
hex
default 0x40
config SOC_DAC_CHAN_NUM
int
@@ -808,8 +800,8 @@ config SOC_MPI_MEM_BLOCKS_NUM
default 4
config SOC_MPI_OPERATIONS_NUM
bool
default y
int
default 1
config SOC_RSA_MAX_BIT_LEN
int
@@ -832,8 +824,8 @@ config SOC_SECURE_BOOT_V1
default y
config SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
bool
default y
int
default 1
config SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
int
components/soc/esp32/include/soc/soc_caps.h
+8 -8
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@@ -1,6 +1,6 @@
/*
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -54,9 +54,9 @@
// Define warning strings here for ECO-ed features to show error when they are used without being
// defined correctly
#define SOC_BROWNOUT_RESET_SUPPORTED "Not determined"
#define SOC_TWAI_BRP_DIV_SUPPORTED "Not determined"
#define SOC_DPORT_WORKAROUND "Not determined"
#define SOC_BROWNOUT_RESET_SUPPORTED "Not determined" // [gen_soc_caps:ignore]
#define SOC_TWAI_BRP_DIV_SUPPORTED "Not determined" // [gen_soc_caps:ignore]
#define SOC_DPORT_WORKAROUND "Not determined" // [gen_soc_caps:ignore]
#endif
/*-------------------------- COMMON CAPS ---------------------------------------*/
@@ -107,7 +107,7 @@
#define SOC_PM_SUPPORTED 1
#if SOC_CAPS_ECO_VER < 200
#define SOC_DPORT_WORKAROUND 1
#define SOC_DPORT_WORKAROUND 1 // [gen_soc_caps:ignore]
#endif // SOC_CAPS_ECO_VER < 200
#define SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL (5U)
@@ -162,7 +162,7 @@
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x40 // bytes
/*-------------------------- DAC CAPS ----------------------------------------*/
#define SOC_DAC_CHAN_NUM 2
@@ -381,7 +381,7 @@
/*--------------------------- MPI CAPS ---------------------------------------*/
#define SOC_MPI_MEM_BLOCKS_NUM (4)
#define SOC_MPI_OPERATIONS_NUM (1)
#define SOC_MPI_OPERATIONS_NUM (1U)
/*--------------------------- RSA CAPS ---------------------------------------*/
#define SOC_RSA_MAX_BIT_LEN (4096)
@@ -399,7 +399,7 @@
* Hence, for now we are handling this special capability in bootloader "security" configuration itself.
*/
#define SOC_SECURE_BOOT_V1 1
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS (1U)
/*-------------------------- Flash Encryption CAPS----------------------------*/
#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (32)
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
+4 -4
View File
@@ -348,8 +348,8 @@ config SOC_CPU_WATCHPOINTS_NUM
default 2
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64
hex
default 0x40
config SOC_DAC_CHAN_NUM
int
@@ -776,8 +776,8 @@ config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
default y
config SOC_SYSTIMER_COUNTER_NUM
bool
default y
int
default 1
config SOC_SYSTIMER_ALARM_NUM
int
components/soc/esp32s2/include/soc/soc_caps.h
+5 -5
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -22,8 +22,8 @@
* x 0`, it's still a risk.)
*
* ECO & exceptions:
* For ECO-ed booleans, `#define x "Not determined"` for them. This will cause error when used by
* `#if x` and `#if !x`, making these missing definitions more obvious.
* For ECO-ed booleans, `#define x "Not determined" // [gen_soc_caps:ignore]` for them. This will cause error when used by
* `#if x` and `#if !x`, making these missing definitions more obvious. Ignore pragma ensures those values are not converted into config options.
*
* These defines are parsed and imported as kconfig variables via the script
* `tools/gen_soc_caps_kconfig/gen_soc_caps_kconfig.py`
@@ -148,7 +148,7 @@
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x40 // bytes
/*-------------------------- DAC CAPS ----------------------------------------*/
#define SOC_DAC_CHAN_NUM 2
@@ -329,7 +329,7 @@
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
/*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM 1 // Number of counter units
#define SOC_SYSTIMER_COUNTER_NUM (1U) // Number of counter units
#define SOC_SYSTIMER_ALARM_NUM 3 // Number of alarm units
#define SOC_SYSTIMER_BIT_WIDTH_LO 32 // Bit width of systimer low part
#define SOC_SYSTIMER_BIT_WIDTH_HI 32 // Bit width of systimer high part
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+4 -4
View File
@@ -412,8 +412,8 @@ config SOC_CPU_WATCHPOINTS_NUM
default 2
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64
hex
default 0x40
config SOC_SIMD_PREFERRED_DATA_ALIGNMENT
int
@@ -840,8 +840,8 @@ config SOC_LP_IO_CLOCK_IS_INDEPENDENT
default y
config SOC_SDM_GROUPS
bool
default y
int
default 1
config SOC_SDM_CHANNELS_PER_GROUP
int
components/soc/esp32s3/include/soc/soc_caps.h
+3 -3
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -146,7 +146,7 @@
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x40 // bytes
#define SOC_SIMD_PREFERRED_DATA_ALIGNMENT 16 // The preferred data alignment accepted by the SIMD instructions, in bytes
@@ -327,7 +327,7 @@
#define SOC_LP_IO_CLOCK_IS_INDEPENDENT 1
/*-------------------------- Sigma Delta Modulator CAPS -----------------*/
#define SOC_SDM_GROUPS 1
#define SOC_SDM_GROUPS (1U)
#define SOC_SDM_CHANNELS_PER_GROUP 8
#define SOC_SDM_CLK_SUPPORT_APB 1