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feat(log): Optimize log tag init for bin logging

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This commit is contained in:
Konstantin Kondrashov
2025-07-01 13:57:47 +03:00
parent 00e90bea33
commit dcf486359e
331 changed files with 678 additions and 612 deletions
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4
components/bootloader_support/bootloader_flash/src/bootloader_flash.c
View File

@@ -48,7 +48,7 @@
#if !NON_OS_BUILD
/* Normal app version maps to spi_flash_mmap.h operations...
*/
static const char *TAG = "bootloader_mmap";
ESP_LOG_ATTR_TAG(TAG, "bootloader_mmap");
static spi_flash_mmap_handle_t map;
@@ -141,7 +141,7 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
extern bool esp_tee_flash_check_paddr_in_active_tee_part(size_t paddr);
#endif
static const char *TAG = "bootloader_flash";
ESP_LOG_ATTR_TAG(TAG, "bootloader_flash");
/*
* NOTE: Memory mapping strategy

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c
View File

@@ -195,7 +195,7 @@ int bootloader_flash_get_wp_pin(void)
#endif
}
static const char *TAG = "boot.esp32";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32");
void bootloader_configure_spi_pins(int drv)
{
@@ -296,19 +296,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -318,53 +318,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c
View File

@@ -81,7 +81,7 @@ void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t *pfhdr)
bootloader_flash_set_dummy_out();
}
static const char *TAG = "boot.esp32c2";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32c2");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
@@ -155,19 +155,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "30MHz";
str = ESP_LOG_ATTR_STR("30MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "15MHz";
str = ESP_LOG_ATTR_STR("15MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "60MHz";
str = ESP_LOG_ATTR_STR("60MHz");
break;
default:
str = "15MHz";
str = ESP_LOG_ATTR_STR("15MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -177,53 +177,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c
View File

@@ -85,7 +85,7 @@ void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t *pfhdr)
bootloader_flash_set_dummy_out();
}
static const char *TAG = "boot.esp32c3";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32c3");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
@@ -166,19 +166,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -188,53 +188,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c
View File

@@ -82,7 +82,7 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
static const char *TAG = "boot.esp32c5";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32c5");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -146,19 +146,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -168,53 +168,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
View File

@@ -65,7 +65,7 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
static const char *TAG = "boot.esp32c6";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32c6");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -129,19 +129,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -151,53 +151,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

38
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c
View File

@@ -142,17 +142,17 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -162,53 +162,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

42
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
View File

@@ -67,7 +67,7 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
static const char *TAG = "boot.esp32h2";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32h2");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -137,19 +137,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "32MHz";
str = ESP_LOG_ATTR_STR("32MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "21.3MHz";
str = ESP_LOG_ATTR_STR("21.3MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "16MHz";
str = ESP_LOG_ATTR_STR("16MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "64MHz";
str = ESP_LOG_ATTR_STR("64MHz");
break;
default:
str = "16MHz";
str = ESP_LOG_ATTR_STR("16MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -159,53 +159,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

38
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c
View File

@@ -21,7 +21,7 @@
#include "hal/clk_tree_ll.h"
#include "soc/pcr_reg.h"
static const char *TAG = "boot.esp32h21";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32h21");
void bootloader_flash_update_id()
{
@@ -134,13 +134,13 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "24MHz";
str = ESP_LOG_ATTR_STR("24MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "48MHz";
str = ESP_LOG_ATTR_STR("48MHz");
break;
default:
str = "16MHz";
str = ESP_LOG_ATTR_STR("16MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -150,53 +150,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

40
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c
View File

@@ -27,7 +27,7 @@
#include "hal/cache_ll.h"
#include "hal/mspi_ll.h"
static const char *TAG = "boot.esp32h4";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32h4");
void bootloader_flash_update_id()
{
@@ -141,16 +141,16 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "24MHz";
str = ESP_LOG_ATTR_STR("24MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "12MHz";
str = ESP_LOG_ATTR_STR("12MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "48MHz";
str = ESP_LOG_ATTR_STR("48MHz");
break;
default:
str = "12MHz";
str = ESP_LOG_ATTR_STR("12MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -160,53 +160,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

44
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -72,7 +72,7 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
static const char *TAG = "boot.esp32p4";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32p4");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -136,19 +136,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -158,53 +158,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

44
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -88,7 +88,7 @@ void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t* pfhdr)
bootloader_flash_set_dummy_out();
}
static const char *TAG = "boot.esp32s2";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32s2");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -170,19 +170,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Speed : %s", str);
@@ -192,53 +192,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

44
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -99,7 +99,7 @@ void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t *pfhdr)
bootloader_flash_set_dummy_out();
}
static const char *TAG = "boot.esp32s3";
ESP_LOG_ATTR_TAG(TAG, "boot.esp32s3");
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@@ -182,19 +182,19 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
const char *str;
switch (bootloader_hdr->spi_speed) {
case ESP_IMAGE_SPI_SPEED_DIV_2:
str = "40MHz";
str = ESP_LOG_ATTR_STR("40MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_3:
str = "26.7MHz";
str = ESP_LOG_ATTR_STR("26.7MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_4:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
case ESP_IMAGE_SPI_SPEED_DIV_1:
str = "80MHz";
str = ESP_LOG_ATTR_STR("80MHz");
break;
default:
str = "20MHz";
str = ESP_LOG_ATTR_STR("20MHz");
break;
}
ESP_EARLY_LOGI(TAG, "Boot SPI Speed : %s", str);
@@ -204,53 +204,53 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
esp_rom_spiflash_read_mode_t spi_mode = bootloader_flash_get_spi_mode();
switch (spi_mode) {
case ESP_ROM_SPIFLASH_QIO_MODE:
str = "QIO";
str = ESP_LOG_ATTR_STR("QIO");
break;
case ESP_ROM_SPIFLASH_QOUT_MODE:
str = "QOUT";
str = ESP_LOG_ATTR_STR("QOUT");
break;
case ESP_ROM_SPIFLASH_DIO_MODE:
str = "DIO";
str = ESP_LOG_ATTR_STR("DIO");
break;
case ESP_ROM_SPIFLASH_DOUT_MODE:
str = "DOUT";
str = ESP_LOG_ATTR_STR("DOUT");
break;
case ESP_ROM_SPIFLASH_FASTRD_MODE:
str = "FAST READ";
str = ESP_LOG_ATTR_STR("FAST READ");
break;
default:
str = "SLOW READ";
str = ESP_LOG_ATTR_STR("SLOW READ");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Mode : %s", str);
switch (bootloader_hdr->spi_size) {
case ESP_IMAGE_FLASH_SIZE_1MB:
str = "1MB";
str = ESP_LOG_ATTR_STR("1MB");
break;
case ESP_IMAGE_FLASH_SIZE_2MB:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
case ESP_IMAGE_FLASH_SIZE_4MB:
str = "4MB";
str = ESP_LOG_ATTR_STR("4MB");
break;
case ESP_IMAGE_FLASH_SIZE_8MB:
str = "8MB";
str = ESP_LOG_ATTR_STR("8MB");
break;
case ESP_IMAGE_FLASH_SIZE_16MB:
str = "16MB";
str = ESP_LOG_ATTR_STR("16MB");
break;
case ESP_IMAGE_FLASH_SIZE_32MB:
str = "32MB";
str = ESP_LOG_ATTR_STR("32MB");
break;
case ESP_IMAGE_FLASH_SIZE_64MB:
str = "64MB";
str = ESP_LOG_ATTR_STR("64MB");
break;
case ESP_IMAGE_FLASH_SIZE_128MB:
str = "128MB";
str = ESP_LOG_ATTR_STR("128MB");
break;
default:
str = "2MB";
str = ESP_LOG_ATTR_STR("2MB");
break;
}
ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);

2
components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
View File

@@ -21,7 +21,7 @@
#include "bootloader_flash_override.h"
static const char *TAG = "qio_mode";
ESP_LOG_ATTR_TAG(TAG, "qio_mode");
/* Array of known flash chips and data to enable Quad I/O mode