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change(clk_tree): add LP_DYN_FAST_CLK to soc_module_clk_t
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@@ -158,6 +158,10 @@ typedef enum {
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// For LP peripherals
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SOC_MOD_CLK_XTAL_D2, /*!< XTAL_D2_CLK comes from the external 40MHz crystal, passing a div of 2 to the LP peripherals */
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SOC_MOD_CLK_LP_PLL, /*!< LP_PLL is from 32kHz XTAL oscillator frequency multipliers, it has a fixed frequency of 8MHz */
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SOC_MOD_CLK_LP_DYN_FAST, /*!< LP_DYN_FAST can be derived from RTC_SLOW_CLK or RTC_FAST_CLK depending on the chip’s power mode:
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in active mode, select RTC_FAST_CLK as the clock source;
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in light/deep sleep mode, select RTC_SLOW_CLK as the clock source */
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SOC_MOD_CLK_LP_PERI, /*!< LP_PERI_CLK is derived from LP_DYN_FAST (configurable divider) */
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SOC_MOD_CLK_INVALID, /*!< Indication of the end of the available module clock sources */
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} soc_module_clk_t;
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@@ -616,14 +620,14 @@ typedef enum {
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/**
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* @brief Array initializer for all supported clock sources of Temperature Sensor
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*/
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#define SOC_TEMP_SENSOR_CLKS {SOC_MOD_CLK_LP_PLL}
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#define SOC_TEMP_SENSOR_CLKS {SOC_MOD_CLK_LP_PERI}
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/**
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* @brief Type of Temp Sensor clock source
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*/
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typedef enum {
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TEMPERATURE_SENSOR_CLK_SRC_LP_PLL = SOC_MOD_CLK_LP_PLL, /*!< Select LP_PLL as the source clock */
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TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_LP_PLL, /*!< Select LP_PLL as the default choice */
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TEMPERATURE_SENSOR_CLK_SRC_LP_PERI = SOC_MOD_CLK_LP_PERI, /*!< Select LP_PERI as the source clock */
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TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_LP_PERI, /*!< Select LP_PERI as the default choice */
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} soc_periph_temperature_sensor_clk_src_t;
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#ifdef __cplusplus
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