From 3c48d5af38cc179d9c61f03898756710aaddd67d Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 19 Aug 2025 16:27:17 +0800 Subject: [PATCH] fix(esp_system): fix ext 32k io revoking breaks sleep io holding --- components/esp_system/port/soc/esp32/clk.c | 6 +++++- components/esp_system/port/soc/esp32c2/clk.c | 6 +++++- components/esp_system/port/soc/esp32c3/clk.c | 6 +++++- components/esp_system/port/soc/esp32c6/clk.c | 7 ++++++- components/esp_system/port/soc/esp32h2/clk.c | 7 ++++++- components/esp_system/port/soc/esp32p4/clk.c | 8 ++++++-- components/esp_system/port/soc/esp32s2/clk.c | 6 +++++- components/esp_system/port/soc/esp32s3/clk.c | 6 +++++- 8 files changed, 43 insertions(+), 9 deletions(-) diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c index 5077968bf58..6ece38241b1 100644 --- a/components/esp_system/port/soc/esp32/clk.c +++ b/components/esp_system/port/soc/esp32/clk.c @@ -61,7 +61,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) */ int retry_32k_xtal = RTC_XTAL_CAL_RETRY; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -85,13 +87,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) } ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); } diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index 3ecbd7e9c28..020769a1e64 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -153,7 +153,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) */ int retry_ext_clk = 3; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { /* external clock needs to be connected to PIN0 before it can * be used. Here we use rtc_clk_cal function to count @@ -173,13 +175,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) } ESP_EARLY_LOGW(TAG, "external clock connected to pin0 not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW))) { rtc_clk_32k_disable_external(); } if (SLOW_CLK_CAL_CYCLES > 0) { diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index 26413a23b68..efda2b813e8 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -144,7 +144,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) */ int retry_32k_xtal = 3; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -168,13 +170,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) } ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); } diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c index cc6cb804e99..df6fbe1da62 100644 --- a/components/esp_system/port/soc/esp32c6/clk.c +++ b/components/esp_system/port/soc/esp32c6/clk.c @@ -130,7 +130,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) */ int retry_32k_xtal = 3; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -157,6 +159,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) } ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) { @@ -165,7 +168,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_slow_src_set(rtc_slow_clk_src); // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) { + if (revoke_32k_enable || \ + (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \ + ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); } diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index b75c301f6de..c323918d803 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -131,7 +131,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) */ int retry_32k_xtal = 3; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -158,6 +160,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) } ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) { @@ -166,7 +169,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_slow_src_set(rtc_slow_clk_src); // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) { + if (revoke_32k_enable || \ + (((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) && \ + ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); } diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c index e3e2ff94099..0cd351f5ad0 100644 --- a/components/esp_system/port/soc/esp32p4/clk.c +++ b/components/esp_system/port/soc/esp32p4/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -114,7 +114,9 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) */ int retry_32k_xtal = 3; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K || rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -141,6 +143,7 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) } ESP_EARLY_LOGW(TAG, "32 kHz clock not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) { @@ -150,7 +153,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K)) { rtc_clk_32k_enable(false); } if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index 2ecf9449cfd..93d7eb43206 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -150,7 +150,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) */ int retry_32k_xtal = RTC_XTAL_CAL_RETRY; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -174,13 +176,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) } ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 90 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); } diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index 64f51125622..3473af73796 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -146,7 +146,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) */ int retry_32k_xtal = RTC_XTAL_CAL_RETRY; + soc_rtc_slow_clk_src_t old_rtc_slow_clk_src = rtc_clk_slow_src_get(); do { + bool revoke_32k_enable = false; if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) { /* 32k XTAL oscillator needs to be enabled and running before it can * be used. Hardware doesn't have a direct way of checking if the @@ -170,13 +172,15 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) } ESP_EARLY_LOGW(TAG, "32 kHz XTAL not found, switching to internal 150 kHz oscillator"); rtc_slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW; + revoke_32k_enable = true; } } } else if (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (revoke_32k_enable || \ + ((old_rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K))) { rtc_clk_32k_enable(false); rtc_clk_32k_disable_external(); }