fix(freertos): Avoid core switch deadlock on start

With CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY=y the main task could
switch core between registering the idle hook and the while loop.

This would cause a deadlock were the current task was waiting for the
idle hook to run on the same core it's busy waiting.

Merge https://github.com/espressif/esp-idf/pull/16149

components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/port.c

@@ -60,6 +60,9 @@ _Static_assert(offsetof( StaticTask_t, pxDummy8 ) == PORT_OFFSET_PX_END_OF_STACK
 
 BaseType_t uxSchedulerRunning = 0;  // Duplicate of xSchedulerRunning, accessible to port files
 volatile UBaseType_t uxInterruptNesting = 0;
+#if configNUM_CORES > 1
+volatile unsigned port_uxCoreStartupDone[portNUM_PROCESSORS] = {0};  // Indicates whether the core has completed its startup sequence
+#endif
 portMUX_TYPE port_xTaskLock = portMUX_INITIALIZER_UNLOCKED;
 portMUX_TYPE port_xISRLock = portMUX_INITIALIZER_UNLOCKED;
 volatile BaseType_t xPortSwitchFlag = 0;
@@ -298,7 +301,9 @@ BaseType_t xPortStartScheduler(void)
     uxInterruptNesting = 0;
     port_uxCriticalNestingIDF = 0;
     uxSchedulerRunning = 0;
-
+#if configNUM_CORES > 1
+    port_uxCoreStartupDone[xPortGetCoreID()] = 0;
+#endif
     /* Setup the hardware to generate the tick. */
     vPortSetupTimer();
 

components/freertos/FreeRTOS-Kernel-SMP/portable/riscv/portasm.S

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,9 @@
     .global pxCurrentTCBs
     .global vTaskSwitchContext
     .global xPortSwitchFlag
+#if ( configNUM_CORES > 1 )
+    .global port_uxCoreStartupDone
+#endif
 #if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
     .global xIsrStack
     .global port_offset_pxStack
@@ -137,6 +140,16 @@ no_switch:
     lw t0, pxCurrentTCBs
     lw sp, 0x0(t0)
 
+#if ( configNUM_CORES > 1 )
+    /* Indicate that this CPU has completed startup */
+    la      t1, port_uxCoreStartupDone      /* t1 = &port_uxCoreStartupDone */
+    csrr    a1, mhartid                     /* a1 = coreID */
+    slli    a1, a1, 2                       /* a1 = coreID * 4 */
+    add     t1, t1, a1                      /* t1 = &port_uxCoreStartupDone[coreID] // a1 contains coreID * 4 */
+    li      a1, 1                           /* a1 = 1 */
+    sw      a1, 0(t1)                       /* port_uxCoreStartupDone[coreID] = 1 */
+#endif /* ( configNUM_CORES > 1 ) */
+
 #if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
     /* esp_hw_stack_guard_set_bounds(pxCurrentTCBs[0]->pxStack,
      *                               pxCurrentTCBs[0]->pxEndOfStack);

components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/port.c

@@ -72,6 +72,7 @@ const DRAM_ATTR uint32_t offset_uxCoreAffinityMask = offsetof(StaticTask_t, uxDu
 
 volatile unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0}; // Indicates whether scheduler is running on a per-core basis
 unsigned int port_interruptNesting[portNUM_PROCESSORS] = {0};  // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
+volatile unsigned port_uxCoreStartupDone[portNUM_PROCESSORS] = {0};  // Indicates whether the core has completed its startup sequence
 #if ( configNUMBER_OF_CORES > 1 )
 //FreeRTOS SMP Locks
 portMUX_TYPE port_xTaskLock = portMUX_INITIALIZER_UNLOCKED;
@@ -339,7 +340,10 @@ BaseType_t xPortStartScheduler( void )
     /* Setup the hardware to generate the tick. */
     vPortSetupTimer();
 
-    port_xSchedulerRunning[xPortGetCoreID()] = 1;
+        /* Initialize all kernel state tracking variables */
+    BaseType_t coreID = xPortGetCoreID();
+    port_xSchedulerRunning[coreID] = 1;
+    port_uxCoreStartupDone[coreID] = 0;
 
 #if configNUM_CORES > 1
     // Workaround for non-thread safe multi-core OS startup (see IDF-4524)

components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/portasm.S

@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: MIT
  *
- * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2016-2025 Espressif Systems (Shanghai) CO LTD
  */
 /*
  * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
@@ -284,7 +284,7 @@ _frxt_int_exit:
 * Manages the tick timer and calls xPortSysTickHandler() every tick.
 * See the detailed description of the XT_RTOS_ENTER macro in xtensa_rtos.h.
 *
-* Callable from C (obeys ABI conventions). Implemented in assmebly code for performance.
+* Callable from C (obeys ABI conventions). Implemented in assembly code for performance.
 *
 **********************************************************************************************************
 */
@@ -373,7 +373,7 @@ _frxt_timer_int:
 *                                           _frxt_tick_timer_init
 *                                      void _frxt_tick_timer_init(void)
 *
-* Initialize timer and timer interrrupt handler (_xt_tick_divisor_init() has already been been called).
+* Initialize timer and timer interrupt handler (_xt_tick_divisor_init() has already been been called).
 * Callable from C (obeys ABI conventions on entry).
 *
 **********************************************************************************************************
@@ -463,6 +463,15 @@ _frxt_dispatch:
     l32i    sp,  a3, TOPOFSTACK_OFFS     /* SP = next_TCB->pxTopOfStack;  */
     s32i    a3,  a2, 0
 
+#if ( configNUM_CORES > 1 )
+    /* Indicate that this CPU has completed startup. */
+    movi    a2, port_uxCoreStartupDone  /* a2 = &port_uxCoreStartupDone */
+    getcoreid a3
+    addx4   a2, a3, a2                  /* a2 = &port_uxCoreStartupDone[coreid] */
+    movi    a3, 1                       /* a3 = 1 */
+    s32i    a3, a2, 0                   /* port_uxCoreStartupDone[coreid] = 1 */
+#endif /* ( configNUM_CORES > 1 ) */
+
     /* Determine the type of stack frame. */
     l32i    a2,  sp, XT_STK_EXIT        /* exit dispatcher or solicited flag */
     bnez    a2,  .L_frxt_dispatch_stk