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feat(driver_spi): update p4 eco5 spi support on real chip
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@@ -44,6 +44,12 @@ extern "C" {
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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#define SPI_LL_MOSI_FREE_LEVEL 0 //Default level after bus initialized
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// CS_WORKAROUND: SPI slave with using DMA, the rx dma suffers from unexpected transactions
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// before slave is ready, need disconnect CS before and after each transaction
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#define SPI_LL_SLAVE_NEEDS_CS_WORKAROUND 1
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#define SPI_LL_SLAVE_NEEDS_RESET_WORKAROUND 1
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#define SPI_LL_SUPPORT_TIME_TUNING 1
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/**
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* The data structure holding calculated clock configuration. Since the
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* calculation needs long time, it should be calculated during initialization and
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