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fix(esp32): Fix access to MALLOC_CAP_IRAM_8BIT byte array in loop
The Xtensa load/store handler did not properly handle 8/16-bit memory access to IRAM regions configured with MALLOC_CAP_IRAM_8BIT (and CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY=y) from a loop (LBEG/LEND/LCOUNT) context. This caused the loop to exit after the first access, instead of continuing to iterate as intended. Closes https://github.com/espressif/esp-idf/issues/14127
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -37,6 +37,7 @@
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*/
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#include "xtensa_rtos.h"
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#include "xtensa/xtensa_zol_macros.h"
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#include "sdkconfig.h"
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#include "soc/soc.h"
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@@ -124,10 +125,11 @@ LoadStoreErrorHandler:
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2:
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/* a4 contains the value */
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wsr a0, sar
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rsr a3, epc1
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addi a3, a3, 3
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XT_ZOL_EPC_LCOUNT_RESTORE a3, a0 // If faulted at LEND, rewinds loop and leaves adjusted PC in a3
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wsr a3, epc1
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wsr a0, sar
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rsr a0, excsave1
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extui a2, a2, 3, 5
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@@ -169,6 +171,7 @@ LoadStoreErrorHandler:
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/* a4 contains the value */
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rsr a6, epc1
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addi a6, a6, 3
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XT_ZOL_EPC_LCOUNT_RESTORE a6, a5 // If faulted at LEND, rewinds loop and leaves adjusted PC in a6
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wsr a6, epc1
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ssa8b a3
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@@ -321,8 +324,9 @@ AlignmentErrorHandler:
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srai a4, a4, 16 // a4 contains the value
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1:
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wsr a3, epc1
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wsr a0, sar
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XT_ZOL_EPC_LCOUNT_RESTORE a3, a0 // If faulted at LEND, rewinds loop and leaves adjusted PC in a3
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wsr a3, epc1
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rsr a0, excsave1
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extui a2, a2, 4, 4
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@@ -379,6 +383,7 @@ AlignmentErrorHandler:
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slli a6, a5, 16 // 0xffff0000
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1:
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XT_ZOL_EPC_LCOUNT_RESTORE a7, a5 // If faulted at LEND, rewinds loop and leaves adjusted PC in a7
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wsr a7, epc1
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movi a5, ~3
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and a5, a3, a5 // a5 has the aligned address
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