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Merge branch 'fix/fix_cam_iram_safe_compile_error_v5.3' into 'release/v5.3'

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cam: fix cam iram safe compile error (v5.3)

See merge request espressif/esp-idf!37607
This commit is contained in:
morris
2025-04-15 10:13:57 +08:00
parent b1c16b8382 dbb06fb027
commit d69f12a7aa
15 changed files with 52 additions and 27 deletions
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15
docs/en/api-reference/peripherals/camera_driver.rst
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@@ -134,8 +134,12 @@ The factory function :cpp:func:`esp_cam_new_csi_ctlr` and :cpp:func:`esp_cam_ctl
Kconfig Options
^^^^^^^^^^^^^^^
- :ref:`CONFIG_CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE` controls whether the default ISR handler should be masked when the cache is disabled
The following Kconfig options affect the behavior of the interrupt handler when cache is disabled:
.. list::
:SOC_MIPI_CSI_SUPPORTED: - :ref:`CONFIG_CAM_CTLR_MIPI_CSI_ISR_CACHE_SAFE`, see :ref:`cam-thread-safety` for more details.
:SOC_ISP_DVP_SUPPORTED: - :ref:`CONFIG_CAM_CTLR_ISP_DVP_ISR_CACHE_SAFE`, see :ref:`cam-thread-safety` for more details.
.. _cam-iram-safe:
@@ -144,7 +148,14 @@ IRAM Safe
By default, the CSI interrupt will be deferred when the cache is disabled because of writing or erasing the flash.
There is a Kconfig option :ref:`CONFIG_CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE` that:
There are Kconfig options
.. list::
:SOC_MIPI_CSI_SUPPORTED: - :ref:`CONFIG_CAM_CTLR_MIPI_CSI_ISR_CACHE_SAFE`
:SOC_ISP_DVP_SUPPORTED: - :ref:`CONFIG_CAM_CTLR_ISP_DVP_ISR_CACHE_SAFE`
that
- Enables the interrupt being serviced even when the cache is disabled
- Places all functions that used by the ISR into IRAM