esp_mm: new virtual memory mapping apis via mmu

components/soc/esp32s3/include/soc/Kconfig.soc_caps.in

@@ -299,10 +299,6 @@ config SOC_BROWNOUT_RESET_SUPPORTED
     bool
     default y
 
-config SOC_MMU_LINEAR_ADDRESS_REGION_NUM
-    int
-    default 1
-
 config SOC_CPU_CORES_NUM
     int
     default 2
@@ -539,6 +535,14 @@ config SOC_MCPWM_SWSYNC_CAN_PROPAGATE
     bool
     default y
 
+config SOC_MMU_LINEAR_ADDRESS_REGION_NUM
+    int
+    default 1
+
+config SOC_MMU_PERIPH_NUM
+    int
+    default 1
+
 config SOC_PCNT_GROUPS
     int
     default 1

components/soc/esp32s3/include/soc/ext_mem_defs.h

@@ -69,9 +69,6 @@ extern "C" {
 #define CACHE_MAX_SYNC_NUM 0x400000
 #define CACHE_MAX_LOCK_NUM 0x8000
 
-#define FLASH_MMU_TABLE ((volatile uint32_t*) DR_REG_MMU_TABLE)
-#define FLASH_MMU_TABLE_SIZE (ICACHE_MMU_SIZE/sizeof(uint32_t))
-
 /**
  * MMU entry valid bit mask for mapping value. For an entry:
  * valid bit + value bits

components/soc/esp32s3/include/soc/soc_caps.h

@@ -116,9 +116,6 @@
 /*-------------------------- BROWNOUT CAPS -----------------------------------*/
 #define SOC_BROWNOUT_RESET_SUPPORTED 1
 
-/*-------------------------- CACHE/MMU CAPS ----------------------------------*/
-#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM       (1U)
-
 /*-------------------------- CPU CAPS ----------------------------------------*/
 #define SOC_CPU_CORES_NUM               2
 #define SOC_CPU_INTR_NUM                32
@@ -221,6 +218,10 @@
 #define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP    (3)    ///< The number of GPIO synchros that each group has
 #define SOC_MCPWM_SWSYNC_CAN_PROPAGATE       (1)    ///< Software sync event can be routed to its output
 
+/*-------------------------- MMU CAPS ----------------------------------------*/
+#define SOC_MMU_LINEAR_ADDRESS_REGION_NUM       (1U)
+#define SOC_MMU_PERIPH_NUM                      (1U)
+
 /*-------------------------- MPU CAPS ----------------------------------------*/
 #include "mpu_caps.h"