feat(esp_hw_support): support PMU clock ICG management for esp32s31

components/soc/esp32s31/include/soc/Kconfig.soc_caps.in

@@ -1507,6 +1507,10 @@ config SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
     bool
     default y
 
+config SOC_PM_SUPPORT_PMU_CLK_ICG
+    bool
+    default y
+
 config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
     bool
     default y

components/soc/esp32s31/include/soc/pmu_icg_mapping.h

@@ -1,11 +1,13 @@
 /*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0 OR MIT
  */
 
 #pragma once
 
+#include <stdint.h>
+
 #define PMU_ICG_APB_ENA_PWM0                    0
 #define PMU_ICG_APB_ENA_PWM1                    1
 #define PMU_ICG_APB_ENA_PWM2                    2
@@ -100,3 +102,16 @@
 #define PMU_ICG_FUNC_ENA_PSRAM_MON              53
 #define PMU_ICG_FUNC_ENA_TCM_MON                54
 #define PMU_ICG_FUNC_ENA_REGDMA                 55
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef uint64_t pmu_sleep_clk_icg_flags_t;
+#define PMU_SLEEP_CLK_ICG_BIT(b)       (((pmu_sleep_clk_icg_flags_t)1) << (b))
+#define PMU_SLEEP_CLK_ICG_FUNC_LO(f)   ((uint32_t)(f))
+#define PMU_SLEEP_CLK_ICG_FUNC_HI(f)   ((uint32_t)((f) >> 32))
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32s31/include/soc/soc_caps.h

@@ -559,6 +559,8 @@
 
 #define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG      (1)
 
+#define SOC_PM_SUPPORT_PMU_CLK_ICG                 (1)
+
 #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */
 
 #define SOC_PM_CPU_RETENTION_BY_SW          (1)