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Merge branch 'fix/i2c_fsm_reset_sequence_v6.0' into 'release/v6.0'

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fix(i2c): reset master before bus clear on chips without HW FSM reset (v6.0)

See merge request espressif/esp-idf!47507
This commit is contained in:
morris
2026-04-28 16:40:53 +08:00
parent 7189c22ef2 a0bb40f208
commit d53e191915
1 changed files with 6 additions and 5 deletions
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components/esp_driver_i2c/i2c_master.c
+6 -5
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@@ -116,11 +116,8 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle
i2c_hal_get_timing_config(hal, &timing_config); i2c_hal_get_timing_config(hal, &timing_config);
i2c_ll_master_get_filter(hal->dev, &filter_cfg); i2c_ll_master_get_filter(hal->dev, &filter_cfg);
//to reset the I2C hw module, we need re-enable the hw // Run bus clear after reset and interrupt masking; reconnecting pins must not wake a stuck FSM.
if (clear_bus) { PERIPH_RCC_ATOMIC() {
ret = s_i2c_master_clear_bus(i2c_master->base);
}
I2C_RCC_ATOMIC() {
i2c_ll_reset_register(i2c_master->base->port_num); i2c_ll_reset_register(i2c_master->base->port_num);
} }
@@ -134,6 +131,10 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master, bool cle
i2c_ll_clear_intr_mask(hal->dev, I2C_LL_INTR_MASK); i2c_ll_clear_intr_mask(hal->dev, I2C_LL_INTR_MASK);
i2c_hal_set_timing_config(hal, &timing_config); i2c_hal_set_timing_config(hal, &timing_config);
i2c_ll_master_set_filter(hal->dev, filter_cfg); i2c_ll_master_set_filter(hal->dev, filter_cfg);
if (clear_bus) {
ret = s_i2c_master_clear_bus(i2c_master->base);
}
#else #else
i2c_ll_master_fsm_rst(hal->dev); i2c_ll_master_fsm_rst(hal->dev);
if (clear_bus) { if (clear_bus) {