From d6736def41f5da2aa7ddc1b2ada49807ffc5e95b Mon Sep 17 00:00:00 2001 From: zwx Date: Mon, 9 Mar 2026 14:31:27 +0800 Subject: [PATCH 1/2] fix(esp_phy): check hw freq hop done before disabling common clock --- components/esp_phy/include/esp_private/phy.h | 6 ++++++ components/esp_phy/lib | 2 +- components/esp_phy/src/phy_common.c | 6 ++++++ components/esp_phy/src/phy_init.c | 1 + components/esp_phy/src/phy_init_esp32hxx.c | 1 + 5 files changed, 15 insertions(+), 1 deletion(-) diff --git a/components/esp_phy/include/esp_private/phy.h b/components/esp_phy/include/esp_private/phy.h index f3133b02213..134813369a1 100644 --- a/components/esp_phy/include/esp_private/phy.h +++ b/components/esp_phy/include/esp_private/phy.h @@ -266,6 +266,12 @@ void esp_phy_sleep_data_init(void); void esp_phy_sleep_data_deinit(void); #endif +/** + * @brief Wait for frequency hardware hop to complete + * + */ +void phy_wait_freq_hw_hop_done(void); + #ifdef __cplusplus } #endif diff --git a/components/esp_phy/lib b/components/esp_phy/lib index ac744ff2c5c..59c1234e929 160000 --- a/components/esp_phy/lib +++ b/components/esp_phy/lib @@ -1 +1 @@ -Subproject commit ac744ff2c5c39c63f8cdd503d4074905647fdbb6 +Subproject commit 59c1234e929212aec0fdda75769b759951235536 diff --git a/components/esp_phy/src/phy_common.c b/components/esp_phy/src/phy_common.c index 02b98188794..ac940bb0921 100644 --- a/components/esp_phy/src/phy_common.c +++ b/components/esp_phy/src/phy_common.c @@ -379,3 +379,9 @@ void phy_wakeup_from_modem_state_extra_init(void) } #endif #endif + +__attribute__((weak)) void phy_wait_freq_hw_hop_done(void) +{ + ESP_LOGD(TAG, "phy_wait_freq_hw_hop_done is not implemented"); + return; +} diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index 8db6cabf917..aa2f4dc3213 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -415,6 +415,7 @@ void esp_phy_disable(esp_phy_modem_t modem) // Update WiFi MAC time before disable WiFi/BT common peripheral clock phy_update_wifi_mac_time(true, esp_timer_get_time()); #endif + phy_wait_freq_hw_hop_done(); // Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG esp_phy_common_clock_disable(); } diff --git a/components/esp_phy/src/phy_init_esp32hxx.c b/components/esp_phy/src/phy_init_esp32hxx.c index 727cb8c8d59..60b5e54175a 100644 --- a/components/esp_phy/src/phy_init_esp32hxx.c +++ b/components/esp_phy/src/phy_init_esp32hxx.c @@ -153,6 +153,7 @@ void esp_phy_disable(esp_phy_modem_t modem) #endif phy_close_rf(); phy_xpd_tsens(); + phy_wait_freq_hw_hop_done(); #if SOC_MODEM_CLOCK_IS_INDEPENDENT modem_clock_module_disable(PERIPH_PHY_MODULE); #endif From 5c8dd4724fe51926885f1f4671964fd8b69928e1 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Wed, 5 Nov 2025 19:57:06 +0800 Subject: [PATCH 2/2] feat(phy): update PHY libraries and improve PLL temperature tracking 1. Allow customization of temperature deltas for PHY track PLL. 2. Fix abnormal PHY state which may trigger task watchdog timeout. --- components/esp_phy/Kconfig | 41 ++++++++++++++++++++ components/esp_phy/include/esp_private/phy.h | 10 +++++ components/esp_phy/src/phy_init.c | 3 ++ components/esp_phy/src/phy_init_esp32hxx.c | 3 ++ 4 files changed, 57 insertions(+) diff --git a/components/esp_phy/Kconfig b/components/esp_phy/Kconfig index 93661e0973f..fcb9bca0db9 100644 --- a/components/esp_phy/Kconfig +++ b/components/esp_phy/Kconfig @@ -207,5 +207,46 @@ menu "PHY" PLL track helps the PHY module adapt to temperature changes, ensuring stable performance. When pll enabled, the ESP PHY module will periodically track and adjust PLL parameters. + config ESP_PHY_PLL_TRACK_TEMP_DEBUG + bool "PHY temperature tracking debug mode" + depends on ESP_PHY_DEBUG + default n + help + If enabled, allows customization of temperature delta for PHY track pll. + + config ESP_PHY_PLL_TRACK_TEMP_DEBUG_FLAG + int "Debug flag for PHY temperature tracking" + depends on ESP_PHY_PLL_TRACK_TEMP_DEBUG + range 1 3 + default 1 + help + Bitmask debug flag passed to the PHY temperature tracking routine. + Each bit enables a specific tracking mode. + + - bit0: PLL tracking + - bit1: Calibration parameter tracking + + config ESP_PHY_PLL_TRACK_TEMP_DELTA + int "Temperature delta for PHY track pll" + depends on ESP_PHY_PLL_TRACK_TEMP_DEBUG + range 0 255 + default 10 + help + Set the temperature delta for PHY track pll. + + config ESP_PHY_INIT_IRAM + bool "Place PHY (de)init in IRAM" + depends on SOC_IEEE802154_BLE_ONLY + default n + help + Select this option to place esp_phy and PHY library functions related to phy_init in IRAM. + This config applies to ESP32-H2, ESP32-H21, and ESP32-H4. + + config ESP_PHY_ENABLE_VERSION_PRINT + bool "Print PHY version" + default y + help + Select to print PHY version in esp_phy_enable. This config only applies to esp32hxx for now. + endif endmenu # PHY diff --git a/components/esp_phy/include/esp_private/phy.h b/components/esp_phy/include/esp_private/phy.h index 134813369a1..b3d8697fb80 100644 --- a/components/esp_phy/include/esp_private/phy.h +++ b/components/esp_phy/include/esp_private/phy.h @@ -272,6 +272,16 @@ void esp_phy_sleep_data_deinit(void); */ void phy_wait_freq_hw_hop_done(void); +#if CONFIG_ESP_PHY_PLL_TRACK_TEMP_DEBUG +/** + * @brief Set the temperature delta for PHY track pll + * + * @param debug_flag Debug flag for PHY temperature tracking + * @param track_temp Temperature delta for PHY temperature tracking + */ +void phy_track_temp_debug(uint8_t debug_flag, uint8_t track_temp); +#endif + #ifdef __cplusplus } #endif diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c index aa2f4dc3213..2459da17fb3 100644 --- a/components/esp_phy/src/phy_init.c +++ b/components/esp_phy/src/phy_init.c @@ -328,6 +328,9 @@ void esp_phy_enable(esp_phy_modem_t modem) assert(phy_module_has_clock_bits(PHY_INIT_MODEM_CLOCK_REQUIRED_BITS)); if (s_is_phy_calibrated == false) { esp_phy_load_cal_and_init(); +#if CONFIG_ESP_PHY_PLL_TRACK_TEMP_DEBUG + phy_track_temp_debug(CONFIG_ESP_PHY_PLL_TRACK_TEMP_DEBUG_FLAG, CONFIG_ESP_PHY_PLL_TRACK_TEMP_DELTA); +#endif s_is_phy_calibrated = true; } else { #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP diff --git a/components/esp_phy/src/phy_init_esp32hxx.c b/components/esp_phy/src/phy_init_esp32hxx.c index 60b5e54175a..c1fa7b5325a 100644 --- a/components/esp_phy/src/phy_init_esp32hxx.c +++ b/components/esp_phy/src/phy_init_esp32hxx.c @@ -118,6 +118,9 @@ void esp_phy_enable(esp_phy_modem_t modem) if (!s_phy_is_enabled) { register_chipv7_phy(NULL, NULL, PHY_RF_CAL_FULL); phy_version_print(); +#if CONFIG_ESP_PHY_PLL_TRACK_TEMP_DEBUG + phy_track_temp_debug(CONFIG_ESP_PHY_PLL_TRACK_TEMP_DEBUG_FLAG, CONFIG_ESP_PHY_PLL_TRACK_TEMP_DELTA); +#endif s_phy_is_enabled = true; } else { phy_wakeup_init();