fix(ci): enable gpio, uart, ledc target tests on esp32p4

This commit is contained in:
Song Ruo Jing
2024-10-23 18:01:50 +08:00
parent 8d472cf779
commit d3c6c9ccb8
8 changed files with 18 additions and 19 deletions
@@ -1,10 +1,6 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_driver_gpio/test_apps:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: test not pass, should be re-enable # TODO: IDF-8968
depends_components:
- esp_driver_gpio
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -122,7 +122,7 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
#elif CONFIG_IDF_TARGET_ESP32P4
// Has no input-only rtcio pins, all pins support pull-up/down
#define RTCIO_SUPPORT_PU_PD(num) 1
#define TEST_GPIO_PIN_COUNT 16
#define TEST_GPIO_PIN_COUNT 14
const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_0, //GPIO0
GPIO_NUM_1, //GPIO1
@@ -131,8 +131,8 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_4, //GPIO4
GPIO_NUM_5, //GPIO5
GPIO_NUM_6, //GPIO6
GPIO_NUM_7, //GPIO7
GPIO_NUM_8, //GPIO8
// GPIO_NUM_7, //GPIO7 // Workaround: IO7 is pullup outside on ESP32P4 Core Board Runner
// GPIO_NUM_8, //GPIO8 // Workaround: IO8 is pullup outside on ESP32P4 Core Board Runner
GPIO_NUM_9, //GPIO9
GPIO_NUM_10, //GPIO10
GPIO_NUM_11, //GPIO11
@@ -10,7 +10,6 @@ CONFIGS = [
]
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='esp32p4 support TBD')
@pytest.mark.supported_targets
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
@@ -23,6 +22,7 @@ def test_gpio(dut: IdfDut) -> None:
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.esp32h2
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
def test_rtc_io(dut: IdfDut) -> None: