fix(esp_hw_support): fix esp32p4 xtal_xpd depends on TOP power domain

This commit is contained in:
wuzhenghui
2025-04-16 15:37:11 +08:00
parent a7cc6804df
commit d2755374e0
9 changed files with 28 additions and 6 deletions
@@ -251,6 +251,10 @@ config SOC_XTAL_SUPPORT_48M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -85,8 +85,9 @@
#define SOC_PHY_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_48M 1
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_48M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)
@@ -247,6 +247,10 @@ config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y
@@ -79,7 +79,8 @@
#define SOC_PM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)
@@ -167,6 +167,10 @@ config SOC_XTAL_SUPPORT_40M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_ADC_PERIPH_NUM
int
default 1
@@ -65,7 +65,8 @@
#define SOC_ECDSA_SUPPORTED 1
#define SOC_SPIRAM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_SUPPORT_40M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
//TODO: [ESP32C61] IDF-9302, IDF-9303, IDF-9304
/*-------------------------- ADC CAPS -------------------------------*/
@@ -239,6 +239,10 @@ config SOC_XTAL_SUPPORT_32M
bool
default y
config SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
bool
default y
config SOC_AES_SUPPORT_DMA
bool
default y
@@ -93,7 +93,8 @@
#define SOC_PM_SUPPORTED 1
/*-------------------------- XTAL CAPS ---------------------------------------*/
#define SOC_XTAL_SUPPORT_32M 1
#define SOC_XTAL_SUPPORT_32M 1
#define SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)