feat(dma2d,ppa): Support flash encryption for DMA2D and PPA

components/soc/esp32/include/soc/Kconfig.soc_caps.in

@@ -783,6 +783,10 @@ config SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SHA_SUPPORT_PARALLEL_ENG
     bool
     default y

components/soc/esp32/include/soc/soc_caps.h

@@ -366,6 +366,8 @@
 /*-------------------------- SPI MEM CAPS ---------------------------------------*/
 #define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE         (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*--------------------------- SHA CAPS ---------------------------------------*/
 /* ESP32 style SHA engine, where multiple states can be stored in parallel */
 #define SOC_SHA_SUPPORT_PARALLEL_ENG    (1)

components/soc/esp32c2/include/soc/Kconfig.soc_caps.in

@@ -563,6 +563,10 @@ config SOC_SPI_MEM_SUPPORT_WRAP
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32c2/include/soc/soc_caps.h

@@ -257,6 +257,8 @@
 #define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
 #define SOC_SPI_MEM_SUPPORT_WRAP                          (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32c3/include/soc/Kconfig.soc_caps.in

@@ -823,6 +823,10 @@ config SOC_SPI_MEM_SUPPORT_WRAP
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32c3/include/soc/soc_caps.h

@@ -352,6 +352,8 @@
 #define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE          (1)
 #define SOC_SPI_MEM_SUPPORT_WRAP                          (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32c5/include/soc/Kconfig.soc_caps.in

@@ -1271,6 +1271,10 @@ config SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32c5/include/soc/soc_caps.h

@@ -488,6 +488,8 @@
 #define SOC_SPI_MEM_FLASH_SUPPORT_HPM                     (1) /*!< Support High Performance Mode */
 #define SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY            (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 // TODO: [ESP32C5] IDF-8707
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -1111,6 +1111,10 @@ config SOC_SPI_MEM_SUPPORT_WRAP
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32c6/include/soc/soc_caps.h

@@ -435,6 +435,8 @@
 #define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
 #define SOC_SPI_MEM_SUPPORT_WRAP                          (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32c61/include/soc/Kconfig.soc_caps.in

@@ -875,6 +875,10 @@ config SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32c61/include/soc/soc_caps.h

@@ -353,6 +353,8 @@
 #define SOC_SPI_MEM_FLASH_SUPPORT_HPM                     (1) /*!< Support High Performance Mode */
 #define SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY            (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -1123,6 +1123,10 @@ config SOC_SPI_MEM_SUPPORT_WRAP
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32h2/include/soc/soc_caps.h

@@ -452,6 +452,8 @@
 #define SOC_SPI_MEM_SUPPORT_CHECK_SUS                     (1)
 #define SOC_SPI_MEM_SUPPORT_WRAP                          (1)
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32h21/include/soc/Kconfig.soc_caps.in

@@ -579,6 +579,10 @@ config SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32h21/include/soc/soc_caps.h

@@ -420,6 +420,8 @@
 #define SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED         1
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32h4/include/soc/Kconfig.soc_caps.in

@@ -283,6 +283,10 @@ config SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32h4/include/soc/soc_caps.h

@@ -420,6 +420,8 @@
 #define SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED         1
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -1711,6 +1711,10 @@ config SOC_MEMSPI_FLASH_PSRAM_INDEPENDENT
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2

components/soc/esp32p4/include/soc/soc_caps.h

@@ -627,6 +627,8 @@
 
 #define SOC_MEMSPI_FLASH_PSRAM_INDEPENDENT        1
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM              3  // Number of alarm units

components/soc/esp32p4/register/hw_ver1/soc/dma2d_struct.h

@@ -33,8 +33,12 @@ typedef union {
         uint32_t outdscr_burst_en_chn:1;
         /** out_ecc_aes_en_chn : R/W; bitpos: [3]; default: 0;
          *  When access address space is ecc/aes area, this bit should be set to 1. In this
-         *  case, the start address of square should be 16-bit aligned. The width of square
-         *  multiply byte number of one pixel should be 16-bit aligned.
+         *  case, the start address of square should be 16-byte aligned. The width of square
+         *  multiply byte number of one pixel should be 16-byte aligned.
+         *
+         *  2D-DMA w/ flash encryption enabled can still work properly even if this bit is not set to 1
+         *  Meanwhile, enabling this bit will restrict addr and size in internal RAM also has to be 16-byte aligned
+         *  Therefore, this bit is not used.
          */
         uint32_t out_ecc_aes_en_chn:1;
         /** out_check_owner_chn : R/W; bitpos: [4]; default: 0;
@@ -749,8 +753,12 @@ typedef union {
         uint32_t indscr_burst_en_chn:1;
         /** in_ecc_aes_en_chn : R/W; bitpos: [3]; default: 0;
          *  When access address space is ecc/aes area, this bit should be set to 1. In this
-         *  case, the start address of square should be 16-bit aligned. The width of square
-         *  multiply byte number of one pixel should be 16-bit aligned.
+         *  case, the start address of square should be 16-byte aligned. The width of square
+         *  multiply byte number of one pixel should be 16-byte aligned.
+         *
+         *  2D-DMA w/ flash encryption enabled can still work properly even if this bit is not set to 1
+         *  Meanwhile, enabling this bit will restrict addr and size in internal RAM also has to be 16-byte aligned
+         *  Therefore, this bit is not used.
          */
         uint32_t in_ecc_aes_en_chn:1;
         /** in_check_owner_chn : R/W; bitpos: [4]; default: 0;

components/soc/esp32p4/register/hw_ver3/soc/dma2d_struct.h

@@ -32,8 +32,12 @@ typedef union {
         uint32_t outdscr_burst_en_chn:1;
         /** out_ecc_aes_en_chn : R/W; bitpos: [3]; default: 0;
          *  When access address space is ecc/aes area, this bit should be set to 1. In this
-         *  case, the start address of square should be 16-bit aligned. The width of square
-         *  multiply byte number of one pixel should be 16-bit aligned.
+         *  case, the start address of square should be 16-byte aligned. The width of square
+         *  multiply byte number of one pixel should be 16-byte aligned.
+         *
+         *  2D-DMA w/ flash encryption enabled can still work properly even if this bit is not set to 1
+         *  Meanwhile, enabling this bit will restrict addr and size in internal RAM also has to be 16-byte aligned
+         *  Therefore, this bit is not used.
          */
         uint32_t out_ecc_aes_en_chn:1;
         /** out_check_owner_chn : R/W; bitpos: [4]; default: 0;
@@ -746,8 +750,12 @@ typedef union {
         uint32_t indscr_burst_en_chn:1;
         /** in_ecc_aes_en_chn : R/W; bitpos: [3]; default: 0;
          *  When access address space is ecc/aes area, this bit should be set to 1. In this
-         *  case, the start address of square should be 16-bit aligned. The width of square
-         *  multiply byte number of one pixel should be 16-bit aligned.
+         *  case, the start address of square should be 16-byte aligned. The width of square
+         *  multiply byte number of one pixel should be 16-byte aligned.
+         *
+         *  2D-DMA w/ flash encryption enabled can still work properly even if this bit is not set to 1
+         *  Meanwhile, enabling this bit will restrict addr and size in internal RAM also has to be 16-byte aligned
+         *  Therefore, this bit is not used.
          */
         uint32_t in_ecc_aes_en_chn:1;
         /** in_check_owner_chn : R/W; bitpos: [4]; default: 0;

components/soc/esp32s2/include/soc/Kconfig.soc_caps.in

@@ -759,6 +759,10 @@ config SOC_MEMSPI_IS_INDEPENDENT
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 1

components/soc/esp32s2/include/soc/soc_caps.h

@@ -325,6 +325,8 @@
 
 #define SOC_MEMSPI_IS_INDEPENDENT                 1
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM  (1U)  // Number of counter units
 #define SOC_SYSTIMER_ALARM_NUM    3  // Number of alarm units

components/soc/esp32s3/include/soc/Kconfig.soc_caps.in

@@ -1435,6 +1435,10 @@ config SOC_SPI_MEM_FLASH_SUPPORT_HPM
     bool
     default y
 
+config SOC_MEMSPI_ENCRYPTION_ALIGNMENT
+    int
+    default 16
+
 config SOC_COEX_HW_PTI
     bool
     default y

components/soc/esp32s3/include/soc/soc_caps.h

@@ -559,6 +559,8 @@
 
 #define SOC_SPI_MEM_FLASH_SUPPORT_HPM                         (1) /*!< Support High Performance Mode */
 
+#define SOC_MEMSPI_ENCRYPTION_ALIGNMENT           16    /*!< 16-byte alignment restriction to mem addr and size if encryption is enabled */
+
 /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
 #define SOC_COEX_HW_PTI                 (1)