Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-03 03:31:41 +03:00
Code Issues Packages Projects Releases Wiki Activity

refactor(xtensa): Rename specreg.h register macros

Browse Source 
This commit renames all registers in xtensa/specreg.h to by adding the
prefix XT_REG_. This is done to avoid naming collisions with similar
variable names. A new register file, viz., xt_specreg.h is created. The
previous names are still available to use but have been deprecated.

Closes https://github.com/espressif/esp-idf/issues/12723
Merges https://github.com/espressif/esp-idf/pull/16040
This commit is contained in:
Nebojsa Cvetkovic
2025-06-17 15:37:33 +02:00
committed by Sudeep Mohanty
parent 2f4c5d278e
commit d0ceef20f4
41 changed files with 824 additions and 289 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_dport.c
+2 -2
View File
@@ -307,11 +307,11 @@ TEST_CASE("test for DPORT access performance", "[esp32]")
static uint32_t start, end;
#define BENCHMARK_START() do { \
RSR(CCOUNT, start); \
RSR(XT_REG_CCOUNT, start); \
} while(0)
#define BENCHMARK_END(OPERATION) do { \
RSR(CCOUNT, end); \
RSR(XT_REG_CCOUNT, end); \
printf("%s took %"PRIu32" cycles/op (%"PRIu32" cycles for %d ops)\n", \
OPERATION, (end - start)/REPEAT_OPS, \
(end - start), REPEAT_OPS); \
components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_dport_xt_highint5.S
+2 -2
View File
@@ -40,7 +40,7 @@ xt_highint5:
wsr a0, CCOMPARE2
esync
rsr a0, EXCSAVE_5 // restore a0
rsr a0, XT_REG_EXCSAVE_5 // restore a0
rfi 5
@@ -74,7 +74,7 @@ xt_highint5:
l32i a4, a0, L5_INTR_A4_OFFSET
rsync
.L_xt_highint5_exit:
rsr a0, EXCSAVE_5 // restore a0
rsr a0, XT_REG_EXCSAVE_5 // restore a0
rfi 5
/* The linker has no reason to link in this file; all symbols it exports are already defined
components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_fp.c
+4 -4
View File
@@ -215,13 +215,13 @@ float IRAM_ATTR test_fp_benchmark_fp_divide(int counts, unsigned *cycles)
{
float f = MAXFLOAT;
uint32_t before, after;
RSR(CCOUNT, before);
RSR(XT_REG_CCOUNT, before);
for (int i = 0; i < counts; i++) {
f /= 1.000432f;
}
RSR(CCOUNT, after);
RSR(XT_REG_CCOUNT, after);
*cycles = (after - before) / counts;
return f;
@@ -254,13 +254,13 @@ float IRAM_ATTR test_fp_benchmark_fp_sqrt(int counts, unsigned *cycles)
{
float f = MAXFLOAT;
uint32_t before, after;
RSR(CCOUNT, before);
RSR(XT_REG_CCOUNT, before);
for (int i = 0; i < counts; i++) {
f = sqrtf(f);
}
RSR(CCOUNT, after);
RSR(XT_REG_CCOUNT, after);
*cycles = (after - before) / counts;
return f;