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feat(esp_psram): wakeup PSRAM by CE# force control instead of dummy write

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wuzhenghui
2026-06-18 11:50:42 +08:00
committed by Song Ruo Jing
parent bc55111320
commit cee20c2f27
2 changed files with 37 additions and 1 deletions
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components/esp_psram/device/esp_psram_impl_ap_hex.c
+5 -1
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@@ -567,7 +567,7 @@ PSRAM_HALFSLEEP_SLEEP_CODE_ATTR void esp_psram_impl_exit_halfsleep_mode(void)
// Record the tick exiting halfsleep mode
s_halfsleep_ctx.halfsleep_wakeup_tick = rtc_time_get();
// Do a SPI dummy write transmission to invalid address to wake up from halfsleep mode
#if PSRAM_CTRLR_LL_MSPI_WAKEUP_WORKAROUND
uint8_t null = 0;
psram_ctrlr_ll_common_transaction(PSRAM_CTRLR_LL_MSPI_ID_3,
AP_HEX_PSRAM_REG_WRITE, AP_HEX_PSRAM_WR_CMD_BITLEN,
@@ -576,6 +576,10 @@ PSRAM_HALFSLEEP_SLEEP_CODE_ATTR void esp_psram_impl_exit_halfsleep_mode(void)
&null, 0,
NULL, 0,
false);
#else
// Set CE# to active to wakeup PSRAM halfsleep
psram_ctrlr_ll_half_sleep_wakeup();
#endif
}
PSRAM_HALFSLEEP_RESUME_CODE_ATTR void esp_psram_impl_resume_from_halfsleep_mode(uint32_t slowclk_period)