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Merge branch 'refactor/riscv_interrupt' into 'master'

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refactor(riscv): Refactor crosscore interrupts and core interrupt code

Closes IDF-5720, DOC-5177, and IDF-7899

See merge request espressif/esp-idf!27845
This commit is contained in:
Omar Chebib
2024-01-19 10:51:04 +08:00
parent 0d9d004d00 102d5bbf72
commit cdde05335e
49 changed files with 1161 additions and 297 deletions
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components/hal/esp32s2/include/hal/crosscore_int_ll.h
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/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/dport_reg.h"
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Clear the crosscore interrupt that just occurred on the current core
*/
static inline void crosscore_int_ll_clear_interrupt(int core_id)
{
DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0);
}
/**
* @brief Trigger a crosscore interrupt on the given core
*
* @param core_id Core to trigger an interrupt on. Ignored on single core targets.
*/
static inline void crosscore_int_ll_trigger_interrupt(int core_id)
{
DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0);
}
#ifdef __cplusplus
}
#endif