diff --git a/components/bt/controller/esp32/bt.c b/components/bt/controller/esp32/bt.c
index 1e06d46246f..ad2e88d6b07 100644
--- a/components/bt/controller/esp32/bt.c
+++ b/components/bt/controller/esp32/bt.c
@@ -47,6 +47,7 @@
 
 #include "esp_rom_sys.h"
 #include "hli_api.h"
+#include "esp_private/sleep_modem.h"
 
 #if CONFIG_BLE_LOG_ENABLED
 #include "ble_log.h"
@@ -1692,7 +1693,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 
     ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
 
-    esp_phy_modem_init();
+    esp_phy_modem_init(SLEEP_MODEM_BT);
 
     esp_bt_power_domain_on();
 
@@ -1867,7 +1868,7 @@ static void bt_controller_deinit_internal(void)
 
     esp_bt_power_domain_off();
 
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
 }
 
 static void bt_controller_shutdown(void* arg)
diff --git a/components/bt/controller/esp32c2/bt.c b/components/bt/controller/esp32c2/bt.c
index 5867c0fd657..ff2df26776c 100644
--- a/components/bt/controller/esp32c2/bt.c
+++ b/components/bt/controller/esp32c2/bt.c
@@ -48,9 +48,7 @@
 #include "esp_private/esp_clk_tree_common.h"
 #include "bt_osi_mem.h"
 
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_modem.h"
-#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/esp_modem_clock.h"
 
 #include "freertos/FreeRTOS.h"
@@ -957,7 +955,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 
     os_msys_init();
 
-    esp_phy_modem_init();
+    esp_phy_modem_init(SLEEP_MODEM_BT);
     periph_module_enable(PERIPH_BT_MODULE);
     periph_module_reset(PERIPH_BT_MODULE);
 
@@ -1037,7 +1035,7 @@ controller_init_err:
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     ble_controller_deinit();
 modem_deint:
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
     periph_module_disable(PERIPH_BT_MODULE);
 
 free_mem:
@@ -1077,7 +1075,7 @@ esp_err_t esp_bt_controller_deinit(void)
 
     npl_freertos_mempool_deinit();
 
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
 
     ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
 
diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c
index 6cc8b286cb9..2bd9e646419 100644
--- a/components/bt/controller/esp32c3/bt.c
+++ b/components/bt/controller/esp32c3/bt.c
@@ -62,6 +62,8 @@
 #endif // CONFIG_BT_CTRL_LE_LOG_STORAGE_EN
 #include "esp_rom_gpio.h"
 #if CONFIG_BT_ENABLED
+#include "esp_private/sleep_modem.h"
+
 
 /* Macro definition
  ************************************************************************
@@ -1851,7 +1853,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 #if CONFIG_MAC_BB_PD
     esp_mac_bb_pd_mem_init();
 #endif
-    esp_phy_modem_init();
+    esp_phy_modem_init(SLEEP_MODEM_BT);
     esp_bt_power_domain_on();
 
     btdm_controller_mem_init();
@@ -2050,7 +2052,7 @@ static void bt_controller_deinit_internal(void)
 #if CONFIG_MAC_BB_PD
     esp_mac_bb_pd_mem_deinit();
 #endif
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
 
 #if CONFIG_BT_CTRL_LE_LOG_EN
     esp_bt_controller_log_deinit();
diff --git a/components/bt/controller/esp32c5/bt.c b/components/bt/controller/esp32c5/bt.c
index 09abeded12d..25b5d50fc52 100644
--- a/components/bt/controller/esp32c5/bt.c
+++ b/components/bt/controller/esp32c5/bt.c
@@ -44,8 +44,8 @@
 #include "soc/regdma.h"
 #include "bt_osi_mem.h"
 
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_modem.h"
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_retention.h"
 #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
 
@@ -957,7 +957,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
     modem_clock_module_mac_reset(PERIPH_BT_MODULE);
     /* Select slow clock source for BT momdule */
     ble_rtc_clk_init(cfg);
-    esp_phy_modem_init();
+    esp_phy_modem_init(SLEEP_MODEM_BT);
 
     if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
         ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
@@ -1045,8 +1045,8 @@ modem_deint:
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     esp_bt_controller_log_deinit();
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-    esp_phy_modem_deinit();
-    // modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
+    modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
 
 free_mem:
@@ -1070,8 +1070,8 @@ esp_err_t esp_bt_controller_deinit(void)
 
     os_msys_deinit();
 
-    esp_phy_modem_deinit();
-    // modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
+    modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
 
     ble_stack_deinitEnv();
diff --git a/components/bt/controller/esp32c6/bt.c b/components/bt/controller/esp32c6/bt.c
index 9677dd4dd68..e74768408ec 100644
--- a/components/bt/controller/esp32c6/bt.c
+++ b/components/bt/controller/esp32c6/bt.c
@@ -45,8 +45,8 @@
 #include "esp_private/esp_clk_tree_common.h"
 #include "bt_osi_mem.h"
 
-#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_modem.h"
+#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_retention.h"
 #include "esp_private/pm_impl.h"
 #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE
@@ -1096,7 +1096,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
     modem_clock_module_mac_reset(PERIPH_BT_MODULE);
     /* Select slow clock source for BT momdule */
     ble_rtc_clk_init(cfg);
-    esp_phy_modem_init();
+    esp_phy_modem_init(SLEEP_MODEM_BT);
 
     if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
         ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
@@ -1194,7 +1194,7 @@ modem_deint:
 #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
     esp_bt_controller_log_deinit();
 #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
     modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
 
@@ -1219,7 +1219,7 @@ esp_err_t esp_bt_controller_deinit(void)
 
     os_msys_deinit();
 
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_BT);
     modem_clock_deselect_lp_clock_source(PERIPH_BT_MODULE);
     modem_clock_module_disable(PERIPH_BT_MODULE);
 
diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h
index f82d0f7dbbe..a415abf9af1 100644
--- a/components/esp_hw_support/include/esp_private/esp_pau.h
+++ b/components/esp_hw_support/include/esp_private/esp_pau.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -25,23 +25,58 @@ extern "C" {
  */
 void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries);
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 /**
- * @brief Set the address of WiFi MAC REGDMA Link in modem state
+ * @brief Set the address of modem REGDMA Link in modem state
  * @param link_addr linked lists address
  */
 void pau_regdma_set_modem_link_addr(void *link_addr);
 
 /**
  * @brief Software trigger regdma to perform modem link backup
+ *
+ * @param blocking software waits for regdma to complete
  */
-void pau_regdma_trigger_modem_link_backup(void);
+void pau_regdma_trigger_modem_link_backup(bool blocking);
 
 /**
  * @brief Software trigger regdma to perform modem link restore
+ *
+ * @param blocking software waits for regdma to complete
  */
-void pau_regdma_trigger_modem_link_restore(void);
-#endif
+void pau_regdma_trigger_modem_link_restore(bool blocking);
+
+/**
+ * @brief Completion process of regdma for modem link retention
+ *
+ */
+ void pau_regdma_modem_link_complete(void);
+
+/**
+ * @brief Enable pau done interrupt
+ *
+ */
+void pau_regdma_done_int_enable(void);
+
+/**
+ * @brief Disable pau done interrupt
+ *
+ */
+void pau_regdma_done_int_disable(void);
+
+/**
+ * @brief Check pau done interrupt status
+ *
+ */
+bool pau_get_regdma_done_status(void);
+
+/**
+ * @brief Clear pau done interrupt status
+ *
+ */
+void pau_clear_regdma_done_status(void);
+
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE */
 
 #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
 /**
diff --git a/components/esp_hw_support/include/esp_private/sleep_modem.h b/components/esp_hw_support/include/esp_private/sleep_modem.h
index 5e6aa72fa3f..405c1f4b422 100644
--- a/components/esp_hw_support/include/esp_private/sleep_modem.h
+++ b/components/esp_hw_support/include/esp_private/sleep_modem.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,11 +10,24 @@
 #include "sdkconfig.h"
 #include "esp_err.h"
 #include "esp_sleep.h"
+#include "esp_attr.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
+#define SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION    (BIT(0))
+#define SLEEP_MODEM_SKIP_WIFI_RETENTION           (BIT(1))
+#define SLEEP_MODEM_RESET_RETENTION               (0)
+#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
+typedef enum {
+    SLEEP_MODEM_WIFI       = 1,
+    SLEEP_MODEM_BT         = 2,
+    SLEEP_MODEM_IEEE802154 = 4,
+} sleep_modem_type_t;
+#define SLEEP_MODEM_MAX_CNT 3
+
 /**
  * @file sleep_modem.h
  *
@@ -77,30 +90,35 @@ void sleep_modem_mac_bb_power_down_prepare(void);
 void sleep_modem_mac_bb_power_up_prepare(void);
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG && CONFIG_MAC_BB_PD
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+/**
+ * @brief Phy retention completes
+ *
+ */
+void sleep_modem_phy_retention_complete(void);
 
 /**
- * @brief The retention action in the modem state of WiFi PHY module
+ * @brief The retention action of PHY module
  *
  * @param restore  true for restore the PHY context, false for backup the PHY context
  */
-void sleep_modem_wifi_do_phy_retention(bool restore);
+void sleep_modem_do_phy_retention(bool restore, uint8_t flags);
 
 /**
- * @brief Get WiFi modem state
+ * @brief Get phy link state
  *
- * @return true or false for WiFi modem state is enabled or disabled
+ * @return true or false for phy link is enabled or disabled
  */
-bool sleep_modem_wifi_modem_state_enabled(void);
+bool sleep_modem_phy_link_enabled(void);
 
 /**
- * @brief Get WiFi modem link done state
+ * @brief Get phy link done state
  *
- * @return true or false for WiFi modem link can be used to enable RF by REGDMA or can not be used
+ * @return true or false for phy link can be used to enable RF by REGDMA or can not be used
  */
-bool sleep_modem_wifi_modem_link_done(void);
+bool sleep_modem_phy_link_done(void);
 
-#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */
 
 /**
  * @brief Whether the current target allows Modem or the TOP power domain to be powered off during light sleep
@@ -198,23 +216,36 @@ void esp_pm_register_light_sleep_default_params_config_callback(update_light_sle
  */
 void esp_pm_unregister_light_sleep_default_params_config_callback(void);
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 /**
- * @brief Init Wi-Fi modem state.
+ * @brief Init phy link.
  *
- * This function init wifi modem state.
-  * @return
-  *   - ESP_OK on success
-  *   - ESP_ERR_NO_MEM if no memory for link
+ * This function init phy link.
+ *
+ * @param modem_mask bit mask of modems
+ * @return
+ *    - ESP_OK on success
+ *    - ESP_ERR_NO_MEM if no memory for link
  */
-esp_err_t sleep_modem_wifi_modem_state_init(void);
+esp_err_t sleep_modem_phy_init(sleep_modem_type_t modem_mask);
 
 /**
- * @brief  Deinit Wi-Fi modem state.
+ * @brief Deinit phy link.
  *
- * This function deinit wifi modem state.
+ * This function deinit phy link.
+ *
+ * @param modem_mask bit mask of modems
  */
-void sleep_modem_wifi_modem_state_deinit(void);
+void sleep_modem_phy_deinit(sleep_modem_type_t modem_mask);
+
+/**
+ * @brief Check if Wi-Fi modem state is enabled
+ *
+ * @return
+ *  - true Wi-Fi modem state is enabled
+ *  - false Wi-Fi modem state is disabled
+ */
+bool sleep_modem_wifi_modem_state_is_enabled(void);
 
 /**
  * @brief Function to check Wi-Fi modem state to skip light sleep.
@@ -227,33 +258,33 @@ void sleep_modem_wifi_modem_state_deinit(void);
 bool sleep_modem_wifi_modem_state_skip_light_sleep(void);
 
 /**
- * @brief Function to initialize and create the modem state phy link
- * @param link_head the pointer that point to the head of the created phy link
+ * @brief Function to initialize and create the phy link
+ * @param link_context PHY link regdma description conteoxt pointer
  * @return
  *   - ESP_OK on success
  *   - ESP_ERR_NO_MEM if no memory for link
  *   - ESP_ERR_INVALID_ARG if value is out of range
  *   - ESP_ERR_INVALID_STATE if the phy module retention state is invalid
  */
-esp_err_t sleep_modem_state_phy_link_init(void **link_head);
+esp_err_t sleep_phy_link_init(void **link_context);
 
 /**
- * @brief Function to destroy and de-initialize modem state phy link
- * @param link_head the phy link head will be destroyed
+ * @brief Function to destroy and de-initialize phy link
+ * @param link_context PHY link regdma description conteoxt pointer
  * @return
  *   - ESP_OK on success
  *   - ESP_ERR_INVALID_ARG if value is out of range
  *   - ESP_ERR_INVALID_STATE if the phy module retention state is invalid
  */
-esp_err_t sleep_modem_state_phy_link_deinit(void *link_head);
+esp_err_t sleep_phy_link_deinit(void *link_context);
 
 /**
  * @brief Function to configure PHY link regdma description at runtime
  * @param link_context PHY link regdma description conteoxt pointer
  * @param flags A bitmap to indicate the PHY link regdma description configuration flag
  */
-void sleep_modem_state_phy_link_config(void *link_context, uint32_t flags);
-#endif
+void sleep_phy_link_config(void *link_context, uint32_t flags);
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY | SOC_PM_SUPPORT_PMU_MODEM_STATE */
 
 #ifdef __cplusplus
 }
diff --git a/components/esp_hw_support/include/esp_private/sleep_retention.h b/components/esp_hw_support/include/esp_private/sleep_retention.h
index 6603c5f0d76..7290c165443 100644
--- a/components/esp_hw_support/include/esp_private/sleep_retention.h
+++ b/components/esp_hw_support/include/esp_private/sleep_retention.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -30,6 +30,17 @@ typedef struct {
 #define RETENTION_MODULE_BITMAP_INIT(module) { .bitmap[(SLEEP_RETENTION_MODULE_ ## module) >> 5] = BIT((SLEEP_RETENTION_MODULE_ ## module) % 32) }
     uint32_t bitmap[SLEEP_RETENTION_MODULE_BITMAP_SZ];
 } sleep_retention_module_bitmap_t;
+
+/**
+ * @brief Set a bit in the retention module bitmap
+ *
+ * @param bitmap_ptr Pointer to the bitmap structure
+ * @param module     Module number (e.g., SLEEP_RETENTION_MODULE_SYS_PERIPH)
+ */
+ #define RETENTION_MODULE_BITMAP_SET(bitmap_ptr, module) \
+ do { \
+     (bitmap_ptr)->bitmap[(module) >> 5] |= BIT((module) % 32); \
+ } while (0)
 typedef regdma_entry_buf_t                  sleep_retention_entries_t;
 typedef regdma_entries_config_t             sleep_retention_entries_config_t;
 
@@ -276,6 +287,22 @@ void sleep_retention_do_extra_retention(bool backup_or_restore);
 void sleep_retention_do_system_retention(bool backup_or_restore);
 #endif
 
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
+/**
+ * @brief Software trigger REGDMA to do phy linked list retention
+ *
+ * @param backup_or_restore true for backup register context to memory
+ *                          or false for restore to register from memory
+ * @param blocking Software wait for REGDMA to complete
+ */
+void sleep_retention_do_phy_retention(bool backup_or_restore, bool blocking);
+
+/**
+ * @brief Completion process of REGDMA for PHY linked list retention
+ *
+ */
+void sleep_retention_phy_retention_complete(void);
+#endif /*SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE */
 #endif // SOC_PAU_SUPPORTED
 
 #ifdef __cplusplus
diff --git a/components/esp_hw_support/lowpower/CMakeLists.txt b/components/esp_hw_support/lowpower/CMakeLists.txt
index 0fb1e23e53b..2781a3d2ea3 100644
--- a/components/esp_hw_support/lowpower/CMakeLists.txt
+++ b/components/esp_hw_support/lowpower/CMakeLists.txt
@@ -37,8 +37,8 @@ if((CONFIG_SOC_PM_SUPPORT_MODEM_PD OR CONFIG_SOC_PM_SUPPORT_TOP_PD) AND CONFIG_S
     list(APPEND srcs "port/${target}/sleep_clock.c")
 endif()
 
-if(CONFIG_SOC_PM_SUPPORT_PMU_MODEM_STATE)
-    list(APPEND srcs "port/${target}/sleep_modem_state.c")
+if(CONFIG_SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY)
+    list(APPEND srcs "port/${target}/sleep_phy.c")
 endif()
 
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}")
diff --git a/components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c
similarity index 95%
rename from components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c
rename to components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c
index d754172e00d..72b0879912a 100644
--- a/components/esp_hw_support/lowpower/port/esp32c5/sleep_modem_state.c
+++ b/components/esp_hw_support/lowpower/port/esp32c5/sleep_phy.c
@@ -45,7 +45,7 @@ typedef struct {
     void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1];
 } sleep_modem_state_phy_link_context_t;
 
-static esp_err_t sleep_modem_state_phy_wifi_init(void *arg)
+static esp_err_t sleep_phy_retention_init(void *arg)
 {
     #define WIFIMAC_ENTRY() (BIT(SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC))
 
@@ -96,12 +96,12 @@ static esp_err_t sleep_modem_state_phy_wifi_init(void *arg)
 }
 #endif
 
-esp_err_t sleep_modem_state_phy_link_init(void **link_head)
+esp_err_t sleep_phy_link_init(void **link_context)
 {
     esp_err_t err = ESP_OK;
 
 #if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC
-    sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_modem_state_phy_wifi_init, .arg = NULL } } };
+    sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = sleep_phy_retention_init, .arg = NULL } } };
     err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_MODEM_PHY, &init_param);
     if (err == ESP_OK) {
         err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_MODEM_PHY);
@@ -118,7 +118,7 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head)
                 }
             }
             if (err == ESP_OK) {
-                *link_head = (void *)&phy_link_context;
+                *link_context = (void *)&phy_link_context;
             }
         }
     }
@@ -126,7 +126,7 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head)
     return err;
 }
 
-void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags)
+void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags)
 {
 #if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC
     sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context;
@@ -141,7 +141,7 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl
 #endif
 }
 
-esp_err_t sleep_modem_state_phy_link_deinit(void *link_head)
+esp_err_t sleep_phy_link_deinit(void *link_head)
 {
     esp_err_t err = ESP_OK;
 #if SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC
diff --git a/components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c
similarity index 56%
rename from components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c
rename to components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c
index 24ae81a91df..ad22ebc030c 100644
--- a/components/esp_hw_support/lowpower/port/esp32c6/sleep_modem_state.c
+++ b/components/esp_hw_support/lowpower/port/esp32c6/sleep_phy.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,13 +16,14 @@
 #include "esp_private/sleep_modem.h"
 #include "esp_private/sleep_retention.h"
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 
 #define SARADC_TSENS_REG                (0x6000e058)
 #define SARADC_TSENS_PU                 (BIT(22))
 #define PMU_RF_PWR_REG                  (0x600b0154)
 
 #define FECOEX_SET_FREQ_SET_CHAN_REG    (0x600a00c0)
+#define FECOEX_SET_FREQ_RESETN          (BIT(30))
 #define FECOEX_SET_CHAN_EN              (BIT(14))
 #define FECOEX_SET_FREQ_SET_CHAN_ST_REG (0x600a00cc)
 #define FECOEX_SET_CHAN_DONE            (BIT(8))
@@ -39,73 +40,79 @@ typedef struct {
 #define DESC_IDX_I2C_MST_ENA (0)
 #define DESC_IDX_I2C_MST_SEL (1)
 #define DESC_IDX_I2C_MST_DIS (2)
-    void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1];
-} sleep_modem_state_phy_link_context_t;
+#define DESC_IDX_SKIP_WIFI               (3)
+#define DESC_SKIP_WIFI_ENTRY_CNT         (8)
+#define DESC_SKIP_WIFI_RESTORE_ENTRY_CNT (1)
+    void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1 + DESC_SKIP_WIFI_ENTRY_CNT];
+} sleep_phy_link_context_t;
 
-esp_err_t sleep_modem_state_phy_link_init(void **link_head)
+esp_err_t sleep_phy_link_init(void **link_context)
 {
     esp_err_t err = ESP_OK;
 
-#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
-    static regdma_link_config_t wifi_modem_config[] = {
+#if SOC_PM_PAU_REGDMA_LINK_MODEM
+    static regdma_link_config_t phy_modem_config[] = {
         [0] = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), MODEM_FE_DATA_BASE, MODEM_FE_DATA_BASE, 41, 0, 0),
         [1] = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(1), MODEM_FE_CTRL_BASE, MODEM_FE_CTRL_BASE, 87, 0, 0),
 
         [2]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x00), MODEM_LPCON_CLK_CONF_REG,         MODEM_LPCON_CLK_I2C_MST_EN,        MODEM_LPCON_CLK_I2C_MST_EN_M,       1, 0), /* I2C MST enable */
         [3]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x01), MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M,  MODEM_LPCON_CLK_I2C_MST_SEL_160M_M, 1, 0), /* I2C MST sel 160m enable */
 
+        /* Reset SET_FREQ fsm */
+        [4]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), FECOEX_SET_FREQ_SET_CHAN_REG,     0,    FECOEX_SET_FREQ_RESETN,                         1, 0),
         /* PMU or software to trigger enable RF PHY */
-        [4]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x02), I2C_ANA_MST_ANA_CONF0_REG,        0x8,                       0xc,        1, 0), /* BBPLL calibration enable */
-        [5]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), PMU_RF_PWR_REG,                   0xf0000000,                0xf0000000, 1, 0),
-        [6]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), SARADC_TSENS_REG,                 SARADC_TSENS_PU,           0x400000,   1, 0),
-        [7]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), I2C_ANA_MST_I2C_BURST_CONF_REG,   0,                         0xffffffff, 1, 0),
-        [8]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        1, 0),
-        [9]  = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x07), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        1, 0),
-        [10] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE,    0x1,        1, 0),
-        [11] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x09), FECOEX_SET_FREQ_SET_CHAN_REG,     FECOEX_SET_CHAN_EN,        0x4000,     1, 0),
-        [12] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_REG,     0,                         0x4000,     1, 0),
-        [13] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), PMU_DATE_REG,                     ~FECOEX_SET_CHAN_DONE,     0x100,      1, 0),
-        [14] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0c), PMU_DATE_REG,                     ~FECOEX_SET_CHAN_DONE,     0x100,      1, 0),
-        [15] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0d), FECOEX_SET_FREQ_SET_CHAN_ST_REG,  FECOEX_SET_CHAN_DONE,      0x100,      1, 0),
-        [16] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0e), MODEM_SYSCON_WIFI_BB_CFG_REG,     BIT(1),                    0x2,        1, 0),
-        [17] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0f), FECOEX_AGC_CONF_REG,              0,                         0x20000000, 1, 0),
+        [5]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x03), I2C_ANA_MST_ANA_CONF0_REG,        0x8,                       0xc,        1, 0), /* BBPLL calibration enable */
+        [6]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x04), PMU_RF_PWR_REG,                   0xf0000000,                0xf0000000, 1, 0),
+        [7]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x05), SARADC_TSENS_REG,                 SARADC_TSENS_PU,           0x400000,   1, 0),
+        [8]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x06), I2C_ANA_MST_I2C_BURST_CONF_REG,   0,                         0xffffffff, 1, 0),
+        [9]  = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x07), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        1, 0),
+        [10] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x08), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        1, 0),
+        [11] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x09), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE,    0x1,        1, 0),
+        [12] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0a), FECOEX_SET_FREQ_SET_CHAN_REG,     FECOEX_SET_FREQ_RESETN,    FECOEX_SET_FREQ_RESETN,          1, 0),
+        [13] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0b), FECOEX_SET_FREQ_SET_CHAN_REG,     FECOEX_SET_CHAN_EN,        0x4000,     1, 0),
+        [14] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0c), FECOEX_SET_FREQ_SET_CHAN_REG,     0,                         0x4000,     1, 0),
+        [15] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x0d), PMU_DATE_REG,                     ~FECOEX_SET_CHAN_DONE,     0x100,      1, 0),
+        [16] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0e), PMU_DATE_REG,                     ~FECOEX_SET_CHAN_DONE,     0x100,      1, 0),
+        [17] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x0f), FECOEX_SET_FREQ_SET_CHAN_ST_REG,  FECOEX_SET_CHAN_DONE,      0x100,      1, 0),
+        [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), MODEM_SYSCON_WIFI_BB_CFG_REG,     BIT(1),                    0x2,        1, 0),
+        [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), FECOEX_AGC_CONF_REG,              0,                         0x20000000, 1, 0),
 
         /* PMU to trigger enable RXBLOCK */
-        [18] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x10), WDEVTXQ_BLOCK,                    0,                         0x1000,     1, 0),
+        [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), WDEVTXQ_BLOCK,                    0,                         0x1000,     1, 0),
 
         /* PMU or software to trigger disable RF PHY */
-        [19] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x11), FECOEX_AGC_CONF_REG,              FECOEX_AGC_DIS,            0x20000000, 0, 1),
-        [20] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x12), MODEM_SYSCON_WIFI_BB_CFG_REG,     0,                         0x2,        0, 1),
-        [21] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), FECOEX_SET_FREQ_SET_CHAN_REG,     0,                         0x4000,     0, 1),
-        [22] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), I2C_ANA_MST_I2C_BURST_CONF_REG,   0,                         0xffffffff, 0, 1),
-        [23] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        0, 1),
-        [24] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x16), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        0, 1),
-        [25] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x17), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE,    0x1,        0, 1),
-        [26] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x18), SARADC_TSENS_REG,                 0,                         0x400000,   0, 1),
-        [27] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x19), PMU_RF_PWR_REG,                   0,                         0xf0000000, 0, 1),
-        [28] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), I2C_ANA_MST_ANA_CONF0_REG,        0x4,                       0xc,        0, 1), /* BBPLL calibration disable */
+        [21] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x13), FECOEX_AGC_CONF_REG,              FECOEX_AGC_DIS,            0x20000000, 0, 1),
+        [22] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x14), MODEM_SYSCON_WIFI_BB_CFG_REG,     0,                         0x2,        0, 1),
+        [23] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x15), FECOEX_SET_FREQ_SET_CHAN_REG,     0,                         0x4000,     0, 1),
+        [24] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x16), I2C_ANA_MST_I2C_BURST_CONF_REG,   0,                         0xffffffff, 0, 1),
+        [25] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x17), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        0, 1),
+        [26] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x18), PMU_DATE_REG,                     ~I2C_ANA_MST_BURST_DONE,   0x1,        0, 1),
+        [27] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x19), I2C_ANA_MST_I2C_BURST_STATUS_REG, I2C_ANA_MST_BURST_DONE,    0x1,        0, 1),
+        [28] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1a), SARADC_TSENS_REG,                 0,                         0x400000,   0, 1),
+        [29] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), PMU_RF_PWR_REG,                   0,                         0xf0000000, 0, 1),
+        [30] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1c), I2C_ANA_MST_ANA_CONF0_REG,        0x4,                       0xc,        0, 1), /* BBPLL calibration disable */
 
-        [29] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1b), MODEM_LPCON_CLK_CONF_REG,         0,                         MODEM_LPCON_CLK_I2C_MST_EN_M,       0, 1), /* I2C MST disable */
+        [31] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1d), MODEM_LPCON_CLK_CONF_REG,         0,                         MODEM_LPCON_CLK_I2C_MST_EN_M,       0, 1), /* I2C MST disable */
 
         /* PMU to trigger disable RXBLOCK */
-        [30] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1c), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
-        [31] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1d), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
-        [32] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1e), WDEVTXQ_BLOCK,                    0,                         0x6000,     0, 1),
-        [33] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1f), WDEVTXQ_BLOCK,                    WDEV_RXBLOCK,              0x1000,     0, 1),
-        [34] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x20), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
-        [35] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x21), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
-        [36] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x22), WDEVTXQ_BLOCK,                    0,                         0x6000,     0, 1),
+        [32] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x1e), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
+        [33] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x1f), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
+        [34] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x20), WDEVTXQ_BLOCK,                    0,                         0x6000,     0, 1),
+        [35] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x21), WDEVTXQ_BLOCK,                    WDEV_RXBLOCK,              0x1000,     0, 1),
+        [36] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x22), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
+        [37] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x23), PMU_DATE_REG,                     ~0,                        0x6000,     0, 1),
+        [38] = REGDMA_LINK_WAIT_INIT (REGDMA_PHY_LINK(0x24), WDEVTXQ_BLOCK,                    0,                         0x6000,     0, 1),
 
-        [37] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x23), PMU_SLP_WAKEUP_CNTL7_REG,         0x200000,                  0xffff0000, 1, 0),
-        [38] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x24), PMU_SLP_WAKEUP_CNTL7_REG,         0x9730000,                 0xffff0000, 0, 1)
+        [39] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x25), PMU_SLP_WAKEUP_CNTL7_REG,         0x200000,                  0xffff0000, 1, 0),
+        [40] = REGDMA_LINK_WRITE_INIT(REGDMA_PHY_LINK(0x26), PMU_SLP_WAKEUP_CNTL7_REG,         0x9730000,                 0xffff0000, 0, 1)
     };
     extern uint32_t phy_ana_i2c_master_burst_rf_onoff(bool on);
-    wifi_modem_config[7].write_wait.value  = phy_ana_i2c_master_burst_rf_onoff(true);
-    wifi_modem_config[22].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false);
+    phy_modem_config[8].write_wait.value  = phy_ana_i2c_master_burst_rf_onoff(true);
+    phy_modem_config[24].write_wait.value = phy_ana_i2c_master_burst_rf_onoff(false);
 
     void *link = NULL;
-    for (int i = ARRAY_SIZE(wifi_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) {
-        void *next = regdma_link_init_safe(&wifi_modem_config[i], false, 0, link);
+    for (int i = ARRAY_SIZE(phy_modem_config) - 1; (err == ESP_OK) && (i >= 0); i--) {
+        void *next = regdma_link_init_safe(&phy_modem_config[i], false, 0, link);
         if (next) {
             link = next;
         } else {
@@ -116,8 +123,11 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head)
     if (err == ESP_OK) {
         pau_regdma_set_modem_link_addr(link);
 
-        const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1b) };
-        static DRAM_ATTR sleep_modem_state_phy_link_context_t phy_link_context;
+        const int id_array[] = { REGDMA_PHY_LINK(0x00), REGDMA_PHY_LINK(0x01), REGDMA_PHY_LINK(0x1d),                           /* I2C MST CLK entries */
+                                 REGDMA_PHY_LINK(0x12), REGDMA_PHY_LINK(0x1e), REGDMA_PHY_LINK(0x1f), REGDMA_PHY_LINK(0x20),
+                                 REGDMA_PHY_LINK(0x21), REGDMA_PHY_LINK(0x22), REGDMA_PHY_LINK(0x23), REGDMA_PHY_LINK(0x24)     /* WiFi Related entries */
+                                };
+        static DRAM_ATTR sleep_phy_link_context_t phy_link_context;
 
         for (int i = 0; (err == ESP_OK) && (i < ARRAY_SIZE(phy_link_context.regdma_desc)); i++) {
             void *desc = regdma_find_link_by_id(link, 0, id_array[i]);
@@ -129,18 +139,20 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head)
         }
         if (err == ESP_OK) {
             phy_link_context.link_head = link;
-            *link_head = (void *)&phy_link_context;
+            *link_context = (void *)&phy_link_context;
+        } else {
+            regdma_link_destroy(link, 0);
         }
     }
 #endif
     return err;
 }
 
-void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags)
+void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags)
 {
-    sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context;
+    sleep_phy_link_context_t *phy_link_context = (sleep_phy_link_context_t *)link_context;
 
-    if (flags & BIT(0)) {
+    if (flags & SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION) {
         regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_ENA], true, true);
         regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_SEL], true, true);
         regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], true, true);
@@ -149,14 +161,27 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl
         regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_SEL], true, false);
         regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_I2C_MST_DIS], false, true);
     }
+
+    if (flags & SLEEP_MODEM_SKIP_WIFI_RETENTION) {
+        for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) {
+            regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, true);
+        }
+    } else {
+        for (int i = 0; i < DESC_SKIP_WIFI_ENTRY_CNT; i++) {
+            if (i < DESC_SKIP_WIFI_RESTORE_ENTRY_CNT) {
+                regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], true, false);
+            } else {
+                regdma_link_set_skip_flag(phy_link_context->regdma_desc[DESC_IDX_SKIP_WIFI + i], false, true);
+            }
+        }
+    }
 }
 
-esp_err_t sleep_modem_state_phy_link_deinit(void *link_head)
+esp_err_t sleep_phy_link_deinit(void *link_context)
 {
-#if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
-    regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0);
+#if SOC_PM_PAU_REGDMA_LINK_MODEM
+    regdma_link_destroy(((sleep_phy_link_context_t *)link_context)->link_head, 0);
 #endif
     return ESP_OK;
 }
-
-#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE */
diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c
similarity index 96%
rename from components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c
rename to components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c
index cb3623011c2..3205314f40c 100644
--- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_modem_state.c
+++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_phy.c
@@ -39,7 +39,7 @@ typedef struct {
     void *regdma_desc[DESC_IDX_I2C_MST_DIS + 1];
 } sleep_modem_state_phy_link_context_t;
 
-esp_err_t sleep_modem_state_phy_link_init(void **link_head)
+esp_err_t sleep_phy_link_init(void **link_context)
 {
     esp_err_t err = ESP_OK;
 
@@ -124,14 +124,14 @@ esp_err_t sleep_modem_state_phy_link_init(void **link_head)
         }
         if (err == ESP_OK) {
             phy_link_context.link_head = link;
-            *link_head = (void *)&phy_link_context;
+            *link_context = (void *)&phy_link_context;
         }
     }
 #endif
     return err;
 }
 
-void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t flags)
+void IRAM_ATTR sleep_phy_link_config(void *link_context, uint32_t flags)
 {
     sleep_modem_state_phy_link_context_t *phy_link_context = (sleep_modem_state_phy_link_context_t *)link_context;
 
@@ -144,10 +144,10 @@ void IRAM_ATTR sleep_modem_state_phy_link_config(void *link_context, uint32_t fl
     }
 }
 
-esp_err_t sleep_modem_state_phy_link_deinit(void *link_head)
+esp_err_t sleep_phy_link_deinit(void *link_context)
 {
 #if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
-    regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_head)->link_head, 0);
+    regdma_link_destroy(((sleep_modem_state_phy_link_context_t *)link_context)->link_head, 0);
 #endif
     return ESP_OK;
 }
diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c
index 4c992d34231..8f013d67a05 100644
--- a/components/esp_hw_support/port/pau_regdma.c
+++ b/components/esp_hw_support/port/pau_regdma.c
@@ -68,26 +68,55 @@ void pau_regdma_set_entry_link_addr(pau_regdma_link_addr_t *link_entries)
     pau_hal_set_regdma_entry_link_addr(PAU_instance()->hal, link_entries);
 }
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 #if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
 void pau_regdma_set_modem_link_addr(void *link_addr)
 {
     pau_hal_set_regdma_modem_link_addr(PAU_instance()->hal, link_addr);
 }
-#endif
+#endif // SOC_PM_PAU_REGDMA_LINK_WIFIMAC
 
-void IRAM_ATTR pau_regdma_trigger_modem_link_backup(void)
+void IRAM_ATTR pau_regdma_trigger_modem_link_backup(bool blocking)
+{
+    pau_hal_start_regdma_modem_link(PAU_instance()->hal, true, blocking);
+    if (blocking) {
+        pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
+    }
+}
+
+void IRAM_ATTR pau_regdma_trigger_modem_link_restore(bool blocking)
+{
+    pau_hal_start_regdma_modem_link(PAU_instance()->hal, false, blocking);
+    if (blocking) {
+        pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
+    }
+}
+
+void IRAM_ATTR pau_regdma_modem_link_complete(void)
 {
-    pau_hal_start_regdma_modem_link(PAU_instance()->hal, true);
     pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
 }
 
-void IRAM_ATTR pau_regdma_trigger_modem_link_restore(void)
+void IRAM_ATTR pau_regdma_done_int_enable(void)
 {
-    pau_hal_start_regdma_modem_link(PAU_instance()->hal, false);
-    pau_hal_stop_regdma_modem_link(PAU_instance()->hal);
+    pau_hal_regdma_done_int_enable(PAU_instance()->hal);
 }
-#endif
+
+void IRAM_ATTR pau_regdma_done_int_disable(void)
+{
+    pau_hal_regdma_done_int_disable(PAU_instance()->hal);
+}
+
+bool IRAM_ATTR pau_get_regdma_done_status(void)
+{
+    return pau_hal_get_regdma_done_status(PAU_instance()->hal);
+}
+
+void IRAM_ATTR pau_clear_regdma_done_status(void)
+{
+    pau_hal_clear_regdma_backup_done_intr_state(PAU_instance()->hal);
+}
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE */
 
 #if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
 void IRAM_ATTR pau_regdma_set_system_link_addr(void *link_addr)
diff --git a/components/esp_hw_support/sleep_modem.c b/components/esp_hw_support/sleep_modem.c
index 7d4fd527cee..a1fac125bdb 100644
--- a/components/esp_hw_support/sleep_modem.c
+++ b/components/esp_hw_support/sleep_modem.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -129,71 +129,98 @@ void IRAM_ATTR mac_bb_power_up_cb_execute(void)
 
 #endif ///CONFIG_MAC_BB_PD
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
-
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 typedef struct sleep_modem_config {
-    struct {
-        void    *phy_link;
-        union {
-            struct {
-                uint32_t modem_state_phy_done: 1;
-                uint32_t reserved: 31;
-            };
-            uint32_t flags;
+    _lock_t phy_link_lock;
+    void    *phy_link;
+    union {
+        struct {
+            uint32_t phy_link_done: 1;
+            uint32_t modem_mask: SLEEP_MODEM_MAX_CNT;
+            uint32_t reserved: 27 - SLEEP_MODEM_MAX_CNT;
         };
-    } wifi;
+        uint32_t flags;
+    };
 } sleep_modem_config_t;
 
-static sleep_modem_config_t s_sleep_modem = { .wifi.phy_link = NULL, .wifi.flags = 0 };
+sleep_modem_config_t s_sleep_modem = { .phy_link = NULL, .flags = 0 };
 
+bool IRAM_ATTR sleep_modem_wifi_modem_state_is_enabled(void)
+{
+    return !!(s_sleep_modem.modem_mask & SLEEP_MODEM_WIFI);
+}
 
-esp_err_t sleep_modem_wifi_modem_state_init(void)
+esp_err_t sleep_modem_phy_init(sleep_modem_type_t modem_mask)
 {
     esp_err_t err = ESP_OK;
-
     void *link = NULL;
-    if (s_sleep_modem.wifi.phy_link == NULL) {
-        err = sleep_modem_state_phy_link_init(&link);
-        if (err == ESP_OK) {
-            s_sleep_modem.wifi.phy_link = link;
-            s_sleep_modem.wifi.flags = 0;
+
+    _lock_acquire(&s_sleep_modem.phy_link_lock);
+    if (s_sleep_modem.modem_mask & modem_mask) {
+        _lock_release(&s_sleep_modem.phy_link_lock);
+        return ESP_ERR_INVALID_ARG;
+    }
+
+    if (!s_sleep_modem.modem_mask) {
+        s_sleep_modem.flags = 0;
+        if (!s_sleep_modem.phy_link) {
+            err = sleep_phy_link_init(&link);
+            if (err == ESP_OK) {
+                s_sleep_modem.phy_link = link;
+            } else {
+                _lock_release(&s_sleep_modem.phy_link_lock);
+                return err;
+            }
         }
     }
+    s_sleep_modem.modem_mask |= modem_mask;
+    _lock_release(&s_sleep_modem.phy_link_lock);
     return err;
 }
 
-__attribute__((unused)) void sleep_modem_wifi_modem_state_deinit(void)
+__attribute__((unused)) void sleep_modem_phy_deinit(sleep_modem_type_t modem_mask)
 {
-    if (s_sleep_modem.wifi.phy_link) {
-        sleep_modem_state_phy_link_deinit(s_sleep_modem.wifi.phy_link);
-        s_sleep_modem.wifi.phy_link = NULL;
-        s_sleep_modem.wifi.flags = 0;
+    _lock_acquire(&s_sleep_modem.phy_link_lock);
+    if (!(s_sleep_modem.modem_mask & modem_mask)) {
+        _lock_release(&s_sleep_modem.phy_link_lock);
+        return;
+    }
+
+    s_sleep_modem.modem_mask &= ~modem_mask;
+    if (s_sleep_modem.phy_link && !s_sleep_modem.modem_mask) {
+        sleep_phy_link_deinit(s_sleep_modem.phy_link);
+        s_sleep_modem.phy_link = NULL;
+        s_sleep_modem.flags = 0;
+    }
+    _lock_release(&s_sleep_modem.phy_link_lock);
+}
+
+void IRAM_ATTR sleep_modem_phy_retention_complete(void)
+{
+    sleep_retention_phy_retention_complete();
+}
+
+void IRAM_ATTR sleep_modem_do_phy_retention(bool restore, uint8_t flags)
+{
+    sleep_phy_link_config(s_sleep_modem.phy_link, flags);
+    sleep_retention_do_phy_retention(!restore, true);
+    sleep_phy_link_config(s_sleep_modem.phy_link, SLEEP_MODEM_RESET_RETENTION);
+    if (!restore) {
+        s_sleep_modem.phy_link_done = 1;
     }
 }
 
-void IRAM_ATTR sleep_modem_wifi_do_phy_retention(bool restore)
+inline __attribute__((always_inline)) bool sleep_modem_phy_link_enabled(void)
 {
-    sleep_modem_state_phy_link_config(s_sleep_modem.wifi.phy_link, 1);
-    if (restore) {
-        pau_regdma_trigger_modem_link_restore();
-    } else {
-        pau_regdma_trigger_modem_link_backup();
-        s_sleep_modem.wifi.modem_state_phy_done = 1;
-    }
-    sleep_modem_state_phy_link_config(s_sleep_modem.wifi.phy_link, 0);
+    return s_sleep_modem.modem_mask;
 }
 
-inline __attribute__((always_inline)) bool sleep_modem_wifi_modem_state_enabled(void)
+inline __attribute__((always_inline)) bool sleep_modem_phy_link_done(void)
 {
-    return (s_sleep_modem.wifi.phy_link != NULL);
+    return (s_sleep_modem.phy_link_done == 1);
 }
 
-inline __attribute__((always_inline)) bool sleep_modem_wifi_modem_link_done(void)
-{
-    return (s_sleep_modem.wifi.modem_state_phy_done == 1);
-}
-
-#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE */
 
 bool modem_domain_pd_allowed(void)
 {
@@ -227,8 +254,8 @@ uint32_t IRAM_ATTR sleep_modem_reject_triggers(void)
 {
     uint32_t reject_triggers = 0;
 #if SOC_PM_SUPPORT_PMU_MODEM_STATE
-    reject_triggers = (s_sleep_modem.wifi.phy_link != NULL) ? BIT(16) : 0;
-#endif
+    reject_triggers = sleep_modem_wifi_modem_state_is_enabled() ? BIT(16) : 0;
+#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */
     return reject_triggers;
 }
 
@@ -239,8 +266,8 @@ bool IRAM_ATTR sleep_modem_wifi_modem_state_skip_light_sleep(void)
     /* To block the system from entering sleep before modem link done. In light
      * sleep mode, the system may switch to modem state, which will cause
      * hardware to fail to enable RF */
-    skip = sleep_modem_wifi_modem_state_enabled() && !sleep_modem_wifi_modem_link_done();
-#endif
+    skip = sleep_modem_wifi_modem_state_is_enabled() && !sleep_modem_phy_link_done();
+#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE */
     return skip;
 }
 
diff --git a/components/esp_hw_support/sleep_retention.c b/components/esp_hw_support/sleep_retention.c
index 4237d28b616..ecb0c28f0c6 100644
--- a/components/esp_hw_support/sleep_retention.c
+++ b/components/esp_hw_support/sleep_retention.c
@@ -999,3 +999,34 @@ void IRAM_ATTR sleep_retention_do_system_retention(bool backup_or_restore)
     }
 }
 #endif
+
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
+void IRAM_ATTR sleep_retention_do_phy_retention(bool backup_or_restore, bool blocking)
+{
+/* since the PHY link and other module links are within the sleep-retention entry (4) context，
+*  add mutex protection to avoid data race.
+*/
+#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
+    _lock_acquire_recursive(&s_retention.lock);
+#endif
+    if (backup_or_restore) {
+        pau_regdma_trigger_modem_link_backup(blocking);
+    } else {
+        pau_regdma_trigger_modem_link_restore(blocking);
+    }
+#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
+    _lock_release_recursive(&s_retention.lock);
+#endif
+}
+
+void IRAM_ATTR sleep_retention_phy_retention_complete(void)
+{
+#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
+    _lock_acquire_recursive(&s_retention.lock);
+#endif
+    pau_regdma_modem_link_complete();
+#if SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY
+    _lock_release_recursive(&s_retention.lock);
+#endif
+}
+#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
diff --git a/components/esp_phy/Kconfig b/components/esp_phy/Kconfig
index e51102d1da3..2e14e8f89c9 100644
--- a/components/esp_phy/Kconfig
+++ b/components/esp_phy/Kconfig
@@ -260,5 +260,11 @@ menu "PHY"
             help
                 Select to print PHY version in esp_phy_enable. This config only applies to esp32hxx for now.
 
+        config ESP_PHY_HW_SWITCH_RF
+            bool "Enable Hardware Triggered RF Switch"
+            depends on SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+            default n
+            help
+                Enabling this feature will allow PHY disable and enable using REGDMA.
     endif
 endmenu  # PHY
diff --git a/components/esp_phy/esp32c6/phy_init_data.c b/components/esp_phy/esp32c6/phy_init_data.c
index a32c3c4668d..69781b7c45e 100644
--- a/components/esp_phy/esp32c6/phy_init_data.c
+++ b/components/esp_phy/esp32c6/phy_init_data.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2016-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -148,12 +148,15 @@ const esp_phy_init_data_t phy_init_data= { {
 
 const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
 
-#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD
-
+#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
 #include "esp_private/sleep_retention.h"
 
 static const char* TAG = "phy_sleep";
+static _lock_t s_phy_fe_retention_lock;
+uint8_t s_phy_fe_retention_ref = 0;
+#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
 
+#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD
 static esp_err_t sleep_retention_wifi_bb_init(void *arg)
 {
     #define N_REGS_WIFI_AGC()       (121)
@@ -161,14 +164,12 @@ static esp_err_t sleep_retention_wifi_bb_init(void *arg)
     #define N_REGS_WIFI_NRX()       (136)
     #define N_REGS_WIFI_BB()        (53)
     #define N_REGS_WIFI_BRX()       (39)
-    #define N_REGS_WIFI_FE_COEX()   (58)
 
     const static sleep_retention_entries_config_t bb_regs_retention[] = {
         [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b00, 0x600a7000, 0x600a7000, N_REGS_WIFI_AGC(),     0, 0), .owner = BIT(0) | BIT(1) }, /* AGC */
         [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b01, 0x600a7400, 0x600a7400, N_REGS_WIFI_TX(),      0, 0), .owner = BIT(0) | BIT(1) }, /* TX */
         [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b02, 0x600a7800, 0x600a7800, N_REGS_WIFI_NRX(),     0, 0), .owner = BIT(0) | BIT(1) }, /* NRX */
         [3] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b03, 0x600a7c00, 0x600a7c00, N_REGS_WIFI_BB(),      0, 0), .owner = BIT(0) | BIT(1) }, /* BB */
-        [4] = { .config = REGDMA_LINK_CONTINUOUS_INIT(0x0b05, 0x600a0000, 0x600a0000, N_REGS_WIFI_FE_COEX(), 0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */
     };
     esp_err_t err = sleep_retention_entries_create(bb_regs_retention, ARRAY_SIZE(bb_regs_retention), 3, SLEEP_RETENTION_MODULE_WIFI_BB);
     ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "WiFi BB");
@@ -182,6 +183,7 @@ void esp_phy_sleep_data_init(void)
         .cbs     = { .create = { .handle = sleep_retention_wifi_bb_init, .arg = NULL } },
         .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM)
     };
+    RETENTION_MODULE_BITMAP_SET(&init_param.depends, SLEEP_RETENTION_MODULE_PHY_FE);
     esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param);
     if (err != ESP_OK) {
         ESP_LOGW(TAG, "WiFi BB sleep retention init failed");
@@ -205,5 +207,57 @@ void esp_phy_sleep_data_deinit(void)
         ESP_LOGW(TAG, "WiFi BB sleep retention deinit failed");
     }
 }
+#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD
 
-#endif /* SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD */
+#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
+static esp_err_t sleep_retention_phy_fe_init(void *arg)
+{
+    #define N_REGS_FE_COEX()       (58)
+    #define REG_FECOEX_BASE         0x600a0000
+
+    const static sleep_retention_entries_config_t phy_fe_regs_retention[] = {
+        [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_FE_LINK(0), REG_FECOEX_BASE, REG_FECOEX_BASE, N_REGS_FE_COEX(),     0, 0), .owner = BIT(0) | BIT(1) }, /* FE COEX */
+    };
+    esp_err_t err = sleep_retention_entries_create(phy_fe_regs_retention, ARRAY_SIZE(phy_fe_regs_retention), 3, SLEEP_RETENTION_MODULE_PHY_FE);
+    ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (%s) retention", "PHY FE");
+    ESP_LOGD(TAG, "PHY FE sleep retention initialization");
+    return ESP_OK;
+}
+
+esp_err_t esp_phy_fe_sleep_data_init(void)
+{
+    _lock_acquire(&s_phy_fe_retention_lock);
+    if (s_phy_fe_retention_ref++ == 0) {
+        sleep_retention_module_init_param_t init_param = {
+            .cbs     = { .create = { .handle = sleep_retention_phy_fe_init, .arg = NULL } },
+            .attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
+        };
+        esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_PHY_FE, &init_param);
+        if (err != ESP_OK) {
+            ESP_LOGW(TAG, "PHY FE sleep retention init failed");
+            s_phy_fe_retention_ref --;
+            _lock_release(&s_phy_fe_retention_lock);
+            return err;
+        }
+    }
+    _lock_release(&s_phy_fe_retention_lock);
+    return ESP_OK;
+}
+
+void esp_phy_fe_sleep_data_deinit(void)
+{
+    _lock_acquire(&s_phy_fe_retention_lock);
+    if (s_phy_fe_retention_ref == 0) {
+        _lock_release(&s_phy_fe_retention_lock);
+        return;
+    }
+
+    if (--s_phy_fe_retention_ref == 0) {
+        esp_err_t err = sleep_retention_module_deinit(SLEEP_RETENTION_MODULE_PHY_FE);
+        if (err != ESP_OK) {
+            ESP_LOGW(TAG, "PHY FE sleep retention deinit failed");
+        }
+    }
+    _lock_release(&s_phy_fe_retention_lock);
+}
+#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
diff --git a/components/esp_phy/include/esp_phy_init.h b/components/esp_phy/include/esp_phy_init.h
index c41e970c5a6..031c1aeec0a 100644
--- a/components/esp_phy/include/esp_phy_init.h
+++ b/components/esp_phy/include/esp_phy_init.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -200,14 +200,18 @@ void esp_phy_load_cal_and_init(void);
 
 /**
  * @brief Initialize backup memory for Phy power up/down
+ *
+ * @param modem Modem calling phy retention
  */
-void esp_phy_modem_init(void);
+void esp_phy_modem_init(uint8_t modem);
 
 /**
  * @brief Deinitialize backup memory for Phy power up/down
  * Set phy_init_flag if all modems deinit on ESP32C3
+ *
+ * @param modem Modem calling phy retention
  */
-void esp_phy_modem_deinit(void);
+void esp_phy_modem_deinit(uint8_t modem);
 
 #if CONFIG_MAC_BB_PD
 /**
diff --git a/components/esp_phy/include/esp_private/phy.h b/components/esp_phy/include/esp_private/phy.h
index b3d8697fb80..3ada790bac3 100644
--- a/components/esp_phy/include/esp_private/phy.h
+++ b/components/esp_phy/include/esp_private/phy.h
@@ -256,7 +256,7 @@ void esp_phy_modem_rf_flag_update(void);
 
 #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_MAC_BB_PD
 /**
- * @brief PHY module sleep data (includes AGC, TX, NRX, BB, FE, etc..) initialize.
+ * @brief PHY module sleep data (includes AGC, TX, NRX, BB, etc..) initialize.
  */
 void esp_phy_sleep_data_init(void);
 
@@ -281,6 +281,19 @@ void phy_wait_freq_hw_hop_done(void);
  */
 void phy_track_temp_debug(uint8_t debug_flag, uint8_t track_temp);
 #endif
+#if SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
+/**
+ * @brief PHY module common memory (FE) initialize
+ *
+ */
+esp_err_t esp_phy_fe_sleep_data_init(void);
+
+/**
+ * @brief PHY module common memory (FE) de-initialize
+ *
+ */
+void esp_phy_fe_sleep_data_deinit(void);
+#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && (CONFIG_MAC_BB_PD || CONFIG_ESP_PHY_HW_SWITCH_RF)
 
 #ifdef __cplusplus
 }
diff --git a/components/esp_phy/src/btbb_init.c b/components/esp_phy/src/btbb_init.c
index a21bfe212a0..dc498832024 100644
--- a/components/esp_phy/src/btbb_init.c
+++ b/components/esp_phy/src/btbb_init.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,6 +20,7 @@ static uint8_t s_btbb_access_ref = 0;
 #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
 #include "esp_private/sleep_retention.h"
 #include "btbb_retention_reg.h"
+#include "esp_private/phy.h"
 static const char* TAG = "btbb_init";
 
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG
@@ -31,11 +32,14 @@ static const char* TAG = "btbb_init";
 static esp_err_t btbb_sleep_retention_init(void *arg)
 {
     const static sleep_retention_entries_config_t btbb_regs_retention[] = {
-        [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
-        [1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
+        { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
+        { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
 #if BB_PART_CNT > 2
-        [2] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
+        { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
 #endif // BB_PART_CNT > 2
+#if BB_PART_CNT > 3
+        { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_BT_BB_LINK(0x03), BB_PART_3_ADDR, BB_PART_3_ADDR, BB_PART_3_SIZE, 0, 0), .owner = BTBB_LINK_OWNER },
+#endif // BB_PART_CNT > 3
     };
     esp_err_t err = sleep_retention_entries_create(btbb_regs_retention, ARRAY_SIZE(btbb_regs_retention), REGDMA_LINK_PRI_BT_MAC_BB, SLEEP_RETENTION_MODULE_BT_BB);
     ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for btbb retention");
@@ -63,14 +67,28 @@ void esp_btbb_enable(void)
     if (s_btbb_access_ref == 0) {
         bt_bb_v2_init_cmplx(BTBB_ENABLE_VERSION_PRINT);
 #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
+        esp_err_t err = ESP_OK;
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+        err = esp_phy_fe_sleep_data_init();
+        if (err != ESP_OK) {
+            _lock_release(&s_btbb_access_lock);
+            return;
+        }
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
         sleep_retention_module_init_param_t init_param = {
             .cbs     = { .create = { .handle = btbb_sleep_retention_init, .arg = NULL } },
             .depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM)
         };
-        esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BT_BB, &init_param);
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+        init_param.depends.bitmap[SLEEP_RETENTION_MODULE_PHY_FE >> 5] |= BIT(SLEEP_RETENTION_MODULE_PHY_FE % 32);
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+        err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BT_BB, &init_param);
         if (err == ESP_OK) {
             err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_BT_BB);
             if (err != ESP_OK) {
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+                esp_phy_fe_sleep_data_deinit();
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
                 ESP_LOGW(TAG, "failed to allocate sleep retention linked list for btbb retention");
             }
         } else {
@@ -88,6 +106,9 @@ void esp_btbb_disable(void)
     if (s_btbb_access_ref && (--s_btbb_access_ref == 0)) {
 #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
         btbb_sleep_retention_deinit();
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+        esp_phy_fe_sleep_data_deinit();
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
 #endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
     }
     _lock_release(&s_btbb_access_lock);
diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index 2459da17fb3..9d3fe389070 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -95,7 +95,7 @@ static bool s_is_phy_reg_stored = false;
 /* Memory to store PHY digital registers */
 static uint32_t* s_phy_digital_regs_mem = NULL;
 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
-#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
+#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF
 static uint8_t s_phy_modem_init_ref = 0;
 #endif
 
@@ -333,19 +333,27 @@ void esp_phy_enable(esp_phy_modem_t modem)
 #endif
             s_is_phy_calibrated = true;
         } else {
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
 #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
             if (!pm_mac_modem_rf_already_enabled()) {
-                if (sleep_modem_wifi_modem_state_enabled() && sleep_modem_wifi_modem_link_done()) {
-                    sleep_modem_wifi_do_phy_retention(true);
+#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */
+                if (sleep_modem_phy_link_enabled() && sleep_modem_phy_link_done()) {
+                    uint8_t modem_flags = SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION;
+                    if (!sleep_modem_wifi_modem_state_is_enabled()) {
+                        modem_flags |= SLEEP_MODEM_SKIP_WIFI_RETENTION;
+                    }
+                    sleep_modem_do_phy_retention(true, modem_flags);
                 } else {
                     phy_wakeup_init();
                 }
+#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
             } else {
                 phy_wakeup_from_modem_state_extra_init();
             }
+#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */
 #else
             phy_wakeup_init();
-#endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */
 
 #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
             phy_digital_regs_load();
@@ -400,12 +408,18 @@ void esp_phy_disable(esp_phy_modem_t modem)
 #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
         phy_digital_regs_store();
 #endif
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
 #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
         pm_mac_modem_clear_rf_power_state();
-        if (sleep_modem_wifi_modem_state_enabled()) {
-            sleep_modem_wifi_do_phy_retention(false);
-        } else
 #endif /* SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */
+        if (sleep_modem_phy_link_enabled()) {
+            uint8_t modem_flags = SLEEP_MODEM_SKIP_I2C_MST_CLK_RETENTION;
+            if (!sleep_modem_wifi_modem_state_is_enabled()) {
+                modem_flags |= SLEEP_MODEM_SKIP_WIFI_RETENTION;
+            }
+            sleep_modem_do_phy_retention(false, modem_flags);
+        } else
+#endif /* SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY */
         {
             // Disable PHY and RF.
             phy_close_rf();
@@ -470,9 +484,9 @@ void esp_wifi_bt_power_domain_off(void)
 #endif // SOC_PM_SUPPORT_MODEM_PD || SOC_PM_SUPPORT_WIFI_PD
 }
 
-void esp_phy_modem_init(void)
+void esp_phy_modem_init(uint8_t modem)
 {
-#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
+#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF
     _lock_acquire(&s_phy_access_lock);
     s_phy_modem_init_ref++;
 #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
@@ -480,18 +494,24 @@ void esp_phy_modem_init(void)
         s_phy_digital_regs_mem = (uint32_t *)heap_caps_malloc(SOC_PHY_DIG_REGS_MEM_SIZE, MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
     }
 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
-    sleep_modem_wifi_modem_state_init();
-#endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+    if (sleep_modem_phy_init(modem) != ESP_OK) {
+        ESP_LOGE(TAG, "failed to initialize sleep modem phy");
+    }
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
     _lock_release(&s_phy_access_lock);
 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
 }
 
-void esp_phy_modem_deinit(void)
+void esp_phy_modem_deinit(uint8_t modem)
 {
-#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
+#if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP || CONFIG_ESP_PHY_HW_SWITCH_RF
     _lock_acquire(&s_phy_access_lock);
 
+    if (s_phy_modem_init_ref == 0) {
+        _lock_release(&s_phy_access_lock);
+        return;
+    }
     s_phy_modem_init_ref--;
     if (s_phy_modem_init_ref == 0) {
 #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
@@ -505,10 +525,10 @@ void esp_phy_modem_deinit(void)
         phy_init_flag();
 #endif // CONFIG_IDF_TARGET_ESP32C3
 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
-        sleep_modem_wifi_modem_state_deinit();
-#endif // CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
     }
+#if (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
+    sleep_modem_phy_deinit(modem);
+#endif // (SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) || CONFIG_ESP_PHY_HW_SWITCH_RF
     _lock_release(&s_phy_access_lock);
 #endif // SOC_PM_MODEM_RETENTION_BY_BACKUPDMA || CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
 }
@@ -532,6 +552,7 @@ void esp_mac_bb_pd_mem_init(void)
     }
     _lock_release(&s_phy_access_lock);
 #elif SOC_PM_MODEM_RETENTION_BY_REGDMA
+    esp_phy_fe_sleep_data_init();
     esp_phy_sleep_data_init();
 #endif
 }
@@ -548,6 +569,7 @@ void esp_mac_bb_pd_mem_deinit(void)
     _lock_release(&s_phy_access_lock);
 #elif SOC_PM_MODEM_RETENTION_BY_REGDMA
     esp_phy_sleep_data_deinit();
+    esp_phy_fe_sleep_data_deinit();
 #endif
 }
 
diff --git a/components/esp_wifi/src/wifi_init.c b/components/esp_wifi/src/wifi_init.c
index 60b256546de..a26541f62eb 100644
--- a/components/esp_wifi/src/wifi_init.c
+++ b/components/esp_wifi/src/wifi_init.c
@@ -236,7 +236,7 @@ static esp_err_t wifi_deinit_internal(void)
 #endif
 #endif /* CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP */
 #ifdef CONFIG_ESP_PHY_ENABLED
-    esp_phy_modem_deinit();
+    esp_phy_modem_deinit(SLEEP_MODEM_WIFI);
 #endif
     s_wifi_inited = false;
 
@@ -424,10 +424,10 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
         esp_wifi_mac_pd_mem_init();
 #endif
 #ifdef CONFIG_ESP_PHY_ENABLED
-        esp_phy_modem_init();
+        esp_phy_modem_init(SLEEP_MODEM_WIFI);
 #endif
 #if CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP
-        if (sleep_modem_wifi_modem_state_enabled()) {
+        if (sleep_modem_wifi_modem_state_is_enabled()) {
             esp_pm_register_skip_light_sleep_callback(sleep_modem_wifi_modem_state_skip_light_sleep);
             esp_wifi_internal_modem_state_configure(true); /* require WiFi to enable automatically receives the beacon */
 #if ESP_MODEM_RF_FLAG_UPDATE_CB_REQUIRED
diff --git a/components/hal/esp32c5/include/hal/pau_ll.h b/components/hal/esp32c5/include/hal/pau_ll.h
index 2a6de7d704b..2c6dfe38cf7 100644
--- a/components/hal/esp32c5/include/hal/pau_ll.h
+++ b/components/hal/esp32c5/include/hal/pau_ll.h
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/soc.h"
+#include "esp_attr.h"
 #include "soc/pau_reg.h"
 #include "soc/pau_struct.h"
 #include "soc/pcr_struct.h"
@@ -21,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline void pau_ll_enable_bus_clock(bool enable)
+FORCE_INLINE_ATTR void pau_ll_enable_bus_clock(bool enable)
 {
     if (enable) {
         PCR.regdma_conf.regdma_clk_en = 1;
@@ -32,107 +33,107 @@ static inline void pau_ll_enable_bus_clock(bool enable)
     }
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
 {
     return dev->regdma_conf.flow_err;
 }
 
-static inline void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
+FORCE_INLINE_ATTR void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
 {
     dev->regdma_conf.link_sel = link;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 1;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 0;
 }
 
-static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem_mac = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 0;
 }
 
-static inline uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
 {
     return dev->regdma_current_link_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
 {
     return dev->regdma_peri_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
 {
     return dev->regdma_mem_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
 {
     return dev->int_raw.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
 {
     return dev->int_st.val;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 1;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 0;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.error_int_ena = 1;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.error_int_ena = 0;
 }
 
-static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.done_int_clr = 1;
 }
 
-static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.error_int_clr = 1;
 }
diff --git a/components/hal/esp32c5/pau_hal.c b/components/hal/esp32c5/pau_hal.c
index da41160446d..ad52bff32f3 100644
--- a/components/hal/esp32c5/pau_hal.c
+++ b/components/hal/esp32c5/pau_hal.c
@@ -15,14 +15,16 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
     lp_aon_ll_set_regdma_link_addr((uint32_t)(*link_addr)[0]);
 }
 
-void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
+void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking)
 {
     pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
     pau_ll_set_regdma_select_wifimac_link(hal->dev);
     pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
     pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
 
-    while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    if (blocking) {
+        while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    }
 }
 
 void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
diff --git a/components/hal/esp32c6/include/hal/pau_ll.h b/components/hal/esp32c6/include/hal/pau_ll.h
index 3a8878c83e9..8df627724ea 100644
--- a/components/hal/esp32c6/include/hal/pau_ll.h
+++ b/components/hal/esp32c6/include/hal/pau_ll.h
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/soc.h"
+#include "esp_attr.h"
 #include "soc/pau_reg.h"
 #include "soc/pau_struct.h"
 #include "soc/pcr_struct.h"
@@ -21,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline void pau_ll_enable_bus_clock(bool enable)
+FORCE_INLINE_ATTR void pau_ll_enable_bus_clock(bool enable)
 {
     if (enable) {
         PCR.regdma_conf.regdma_clk_en = 1;
@@ -32,137 +33,137 @@ static inline void pau_ll_enable_bus_clock(bool enable)
     }
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
 {
     return dev->regdma_conf.flow_err;
 }
 
-static inline void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
+FORCE_INLINE_ATTR void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
 {
     dev->regdma_conf.link_sel = link;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 1;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 0;
 }
 
-static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem_mac = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_0_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_1_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_2_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_3_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_mac_addr.val = (uint32_t)link_addr;
 }
 
-static inline uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
 {
     return dev->regdma_current_link_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
 {
     return dev->regdma_backup_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
 {
     return dev->regdma_mem_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
 {
     return dev->int_raw.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
 {
     return dev->int_st.val;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 1;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 0;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
 {
     dev->int_ena.error_int_ena = enable;
 }
 
-static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.done_int_clr = 1;
 }
 
-static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.error_int_clr = 1;
 }
 
-static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
 {
     dev->regdma_bkp_conf.link_tout_thres = count;
 }
 
-static inline void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
 {
     dev->regdma_bkp_conf.read_interval = interval;
 }
diff --git a/components/hal/esp32c6/pau_hal.c b/components/hal/esp32c6/pau_hal.c
index 765e6e36e26..6222891ddc3 100644
--- a/components/hal/esp32c6/pau_hal.c
+++ b/components/hal/esp32c6/pau_hal.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,14 +18,26 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
      * REGDMA link 3 */
 }
 
-void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
+void IRAM_ATTR pau_hal_regdma_wait_done(pau_hal_context_t *hal)
+{
+    while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+}
+
+void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking)
 {
     pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
     pau_ll_set_regdma_select_wifimac_link(hal->dev);
     pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
     pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
 
-    while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    if (blocking) {
+        pau_hal_regdma_wait_done(hal);
+    }
+}
+
+bool IRAM_ATTR pau_hal_get_regdma_done_status(pau_hal_context_t *hal)
+{
+    return (pau_ll_get_regdma_intr_status(hal->dev) & 0x1);
 }
 
 void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
diff --git a/components/hal/esp32c61/include/hal/pau_ll.h b/components/hal/esp32c61/include/hal/pau_ll.h
index 6a19d22a7b4..02e0be06599 100644
--- a/components/hal/esp32c61/include/hal/pau_ll.h
+++ b/components/hal/esp32c61/include/hal/pau_ll.h
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/soc.h"
+#include "esp_attr.h"
 #include "soc/pau_reg.h"
 #include "soc/pau_struct.h"
 #include "soc/pcr_struct.h"
@@ -21,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline void pau_ll_enable_bus_clock(bool enable)
+FORCE_INLINE_ATTR void pau_ll_enable_bus_clock(bool enable)
 {
     if (enable) {
         PCR.regdma_conf.regdma_clk_en = 1;
@@ -32,137 +33,137 @@ static inline void pau_ll_enable_bus_clock(bool enable)
     }
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
 {
     return dev->regdma_conf.flow_err;
 }
 
-static inline void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
+FORCE_INLINE_ATTR void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
 {
     dev->regdma_conf.link_sel = link;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 1;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 0;
 }
 
-static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem_mac = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_0_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_1_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_2_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_3_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_mac_addr.val = (uint32_t)link_addr;
 }
 
-static inline uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
 {
     return dev->regdma_current_link_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
 {
     return dev->regdma_backup_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
 {
     return dev->regdma_mem_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
 {
     return dev->int_raw.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
 {
     return dev->int_st.val;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 1;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 0;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
 {
     dev->int_ena.error_int_ena = enable;
 }
 
-static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.done_int_clr = 1;
 }
 
-static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.error_int_clr = 1;
 }
 
-static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
 {
     dev->regdma_bkp_conf.link_tout_thres = count;
 }
 
-static inline void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
 {
     dev->regdma_bkp_conf.read_interval = interval;
 }
diff --git a/components/hal/esp32c61/pau_hal.c b/components/hal/esp32c61/pau_hal.c
index 335188cc5a6..411b7bb0743 100644
--- a/components/hal/esp32c61/pau_hal.c
+++ b/components/hal/esp32c61/pau_hal.c
@@ -18,14 +18,16 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
      * REGDMA link 3 */
 }
 
-void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
+void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking)
 {
     pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
     pau_ll_set_regdma_select_wifimac_link(hal->dev);
     pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
     pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
 
-    while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    if (blocking) {
+        while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    }
 }
 
 void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
diff --git a/components/hal/esp32h2/include/hal/pau_ll.h b/components/hal/esp32h2/include/hal/pau_ll.h
index 7ce03f6d7b6..365490ff955 100644
--- a/components/hal/esp32h2/include/hal/pau_ll.h
+++ b/components/hal/esp32h2/include/hal/pau_ll.h
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/soc.h"
+#include "esp_attr.h"
 #include "soc/pau_reg.h"
 #include "soc/pau_struct.h"
 #include "soc/pcr_struct.h"
@@ -21,7 +22,7 @@
 extern "C" {
 #endif
 
-static inline void pau_ll_enable_bus_clock(bool enable)
+FORCE_INLINE_ATTR void pau_ll_enable_bus_clock(bool enable)
 {
     if (enable) {
         PCR.regdma_conf.regdma_clk_en = 1;
@@ -32,107 +33,107 @@ static inline void pau_ll_enable_bus_clock(bool enable)
     }
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
 {
     return dev->regdma_conf.flow_err;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
 {
     dev->regdma_conf.link_sel = link;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem = to_mem ? 1 : 0;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 1;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 0;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_0_addr.val = (uint32_t)link_addr;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_1_addr.val = (uint32_t)link_addr;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_2_addr.val = (uint32_t)link_addr;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_3_addr.val = (uint32_t)link_addr;
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
 {
     return dev->regdma_current_link_addr.val;
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
 {
     return dev->regdma_backup_addr.val;
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
 {
     return dev->regdma_mem_addr.val;
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
 {
     return dev->int_raw.val;
 }
 
-static inline __attribute__((always_inline)) uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
 {
     return dev->int_st.val;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 1;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 0;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
 {
     dev->int_ena.error_int_ena = enable;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.done_int_clr = 1;
 }
 
-static inline __attribute__((always_inline)) void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR __attribute__((always_inline)) void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.error_int_clr = 1;
 }
 
-static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
 {
     dev->regdma_bkp_conf.link_tout_thres = count;
 }
 
-static inline void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
 {
     dev->regdma_bkp_conf.read_interval = interval;
 }
diff --git a/components/hal/esp32p4/include/hal/pau_ll.h b/components/hal/esp32p4/include/hal/pau_ll.h
index 40ef69d1804..066ab11836c 100644
--- a/components/hal/esp32p4/include/hal/pau_ll.h
+++ b/components/hal/esp32p4/include/hal/pau_ll.h
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/soc.h"
+#include "esp_attr.h"
 #include "soc/hp_sys_clkrst_struct.h"
 #include "soc/pau_reg.h"
 #include "soc/pau_struct.h"
@@ -22,7 +23,7 @@
 extern "C" {
 #endif
 
-static inline void _pau_ll_enable_bus_clock(bool enable)
+FORCE_INLINE_ATTR void _pau_ll_enable_bus_clock(bool enable)
 {
     if (enable) {
         HP_SYS_CLKRST.soc_clk_ctrl1.reg_regdma_sys_clk_en = 1;
@@ -37,137 +38,137 @@ static inline void _pau_ll_enable_bus_clock(bool enable)
 /// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
 #define pau_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _pau_ll_enable_bus_clock(__VA_ARGS__)
 
-static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
 {
     return dev->regdma_conf.flow_err;
 }
 
-static inline void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
+FORCE_INLINE_ATTR void pau_ll_select_regdma_entry_link(pau_dev_t *dev, int link)
 {
     dev->regdma_conf.link_sel = link;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 1;
 }
 
-static inline void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_entry_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start = 0;
 }
 
-static inline void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_select_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_deselect_wifimac_link(pau_dev_t *dev)
 {
     dev->regdma_conf.sel_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_direction(pau_dev_t *dev, bool to_mem)
 {
     dev->regdma_conf.to_mem_mac = to_mem ? 1 : 0;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_enable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 1;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_backup_start_disable(pau_dev_t *dev)
 {
     dev->regdma_conf.start_mac = 0;
 }
 
-static inline void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link0_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_0_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link1_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_1_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link2_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_2_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link3_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_3_addr.val = (uint32_t)link_addr;
 }
 
-static inline void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_wifimac_link_addr(pau_dev_t *dev, void *link_addr)
 {
     dev->regdma_link_mac_addr.val = (uint32_t)link_addr;
 }
 
-static inline uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_current_link_addr(pau_dev_t *dev)
 {
     return dev->regdma_current_link_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_backup_addr(pau_dev_t *dev)
 {
     return dev->regdma_backup_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_memory_addr(pau_dev_t *dev)
 {
     return dev->regdma_mem_addr.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_raw_signal(pau_dev_t *dev)
 {
     return dev->int_raw.val;
 }
 
-static inline uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
+FORCE_INLINE_ATTR uint32_t pau_ll_get_regdma_intr_status(pau_dev_t *dev)
 {
     return dev->int_st.val;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_enable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 1;
 }
 
-static inline void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_done_intr_disable(pau_dev_t *dev)
 {
     dev->int_ena.done_int_ena = 0;
 }
 
-static inline void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_backup_error_intr_enable(pau_dev_t *dev, bool enable)
 {
     dev->int_ena.error_int_ena = enable;
 }
 
-static inline void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_done_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.done_int_clr = 1;
 }
 
-static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
+FORCE_INLINE_ATTR void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
 {
     dev->int_clr.error_int_clr = 1;
 }
 
-static inline void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_retry_count(pau_dev_t *dev, int count)
 {
     dev->regdma_bkp_conf.link_tout_thres = count;
 }
 
-static inline void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
+FORCE_INLINE_ATTR void pau_ll_set_regdma_link_wait_read_interval(pau_dev_t *dev, int interval)
 {
     dev->regdma_bkp_conf.read_interval = interval;
 }
diff --git a/components/hal/esp32p4/pau_hal.c b/components/hal/esp32p4/pau_hal.c
index ebf58c180f1..515ed158dfe 100644
--- a/components/hal/esp32p4/pau_hal.c
+++ b/components/hal/esp32p4/pau_hal.c
@@ -26,14 +26,16 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
     lp_sys_ll_set_pau_link_addr((uint32_t)(*link_addr)[0]);
 }
 
-void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore)
+void IRAM_ATTR pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking)
 {
     pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
     pau_ll_set_regdma_select_wifimac_link(hal->dev);
     pau_ll_set_regdma_wifimac_link_backup_direction(hal->dev, backup_or_restore);
     pau_ll_set_regdma_wifimac_link_backup_start_enable(hal->dev);
 
-    while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    if (blocking) {
+        while (!(pau_ll_get_regdma_intr_raw_signal(hal->dev) & PAU_DONE_INT_RAW));
+    }
 }
 
 void IRAM_ATTR pau_hal_stop_regdma_modem_link(pau_hal_context_t *hal)
diff --git a/components/hal/include/hal/pau_hal.h b/components/hal/include/hal/pau_hal.h
index 5311e6bc617..65241227898 100644
--- a/components/hal/include/hal/pau_hal.h
+++ b/components/hal/include/hal/pau_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -37,7 +37,7 @@ typedef struct {
  */
 void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_addr_t *link_addr);
 
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY || SOC_PM_SUPPORT_PMU_MODEM_STATE
 #if SOC_PM_PAU_REGDMA_LINK_WIFIMAC
 /**
  * @brief Set regdma modem link address
@@ -46,15 +46,23 @@ void pau_hal_set_regdma_entry_link_addr(pau_hal_context_t *hal, pau_regdma_link_
  * @param link_addr     modem link address value
  */
 #define pau_hal_set_regdma_modem_link_addr(hal, addr)   pau_ll_set_regdma_wifimac_link_addr((hal)->dev, (addr))
-#endif
+#endif // SOC_PM_PAU_REGDMA_LINK_WIFIMAC
+
+/**
+ * @brief Wait until regdma completes
+ *
+ * @param hal           regdma hal context
+ */
+void pau_hal_regdma_wait_done(pau_hal_context_t *hal);
 
 /**
  * @brief Start transmission on regdma modem link
  *
  * @param hal           regdma hal context
  * @param backup_or_restore        false:restore true:backup
+ * @param blocking                 software wait till regdma completes
  */
-void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore);
+void pau_hal_start_regdma_modem_link(pau_hal_context_t *hal, bool backup_or_restore, bool blocking);
 
 /**
  * @brief Stop transmission on regdma modem link
@@ -90,6 +98,34 @@ void pau_hal_start_regdma_system_link(pau_hal_context_t *hal, bool backup_or_res
 void pau_hal_stop_regdma_system_link(pau_hal_context_t *hal);
 #endif
 
+/**
+ * @brief Enable regdma done interrupt
+ *
+ * @param hal            regdma hal context
+ */
+#define pau_hal_regdma_done_int_enable(hal)    pau_ll_set_regdma_backup_done_intr_enable((hal)->dev)
+
+/**
+ * @brief Disable regdma done interrupt
+ *
+ * @param hal            regdma hal context
+ */
+#define pau_hal_regdma_done_int_disable(hal)    pau_ll_set_regdma_backup_done_intr_disable((hal)->dev)
+
+/**
+ * @brief Get regdma done interrupt status
+ *
+ * @param hal            regdma hal context
+ */
+bool pau_hal_get_regdma_done_status(pau_hal_context_t *hal);
+
+/**
+ * @brief Clear regdma done interrupt status
+ *
+ * @param hal            regdma hal context
+ */
+#define pau_hal_clear_regdma_backup_done_intr_state(hal)    pau_ll_clear_regdma_backup_done_intr_state((hal)->dev)
+
 #if SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
 /**
  * @brief Set regdma extra link address
diff --git a/components/ieee802154/driver/esp_ieee802154_dev.c b/components/ieee802154/driver/esp_ieee802154_dev.c
index 63065bd118a..51934a0d21a 100644
--- a/components/ieee802154/driver/esp_ieee802154_dev.c
+++ b/components/ieee802154/driver/esp_ieee802154_dev.c
@@ -35,13 +35,15 @@
 #include "esp_pm.h"
 #include "esp_private/esp_clk.h"
 #include "esp_private/sleep_retention.h"
-#include "esp_private/sleep_modem.h"
 #if SOC_PM_RETENTION_HAS_CLOCK_BUG
 #define IEEE802154_LINK_OWNER  ENTRY(3)
 #else
 #define IEEE802154_LINK_OWNER  ENTRY(0) | ENTRY(2)
 #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG
 #endif // CONFIG_PM_ENABLE
+#if CONFIG_PM_ENABLE || SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+#include "esp_private/sleep_modem.h"
+#endif // CONFIG_PM_ENABLE || SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
 
 static bool s_rf_closed = true;
 #define CCA_DETECTION_TIME 8
@@ -935,17 +937,31 @@ esp_err_t ieee802154_mac_init(void)
     ret = esp_intr_alloc(ieee802154_periph.irq_id, 0, ieee802154_isr, NULL, &s_ieee802154_isr_handle);
     ESP_RETURN_ON_FALSE(ret == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC init failed");
 
-    ESP_RETURN_ON_FALSE(ieee802154_sleep_init() == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC sleep init failed");
+    ret = ieee802154_sleep_init();
+    if (unlikely(ret != ESP_OK)) {
+        ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC sleep init failed", __FUNCTION__, __LINE__);
+        if (esp_intr_free(s_ieee802154_isr_handle) != ESP_OK) {
+            ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC ISR deinit failed", __FUNCTION__, __LINE__);
+        }
+        s_ieee802154_isr_handle = NULL;
+        return ret;
+    }
 
 #if CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE
     esp_coex_ieee802154_force_rx_enable(true);
 #endif
 
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+    esp_phy_modem_init(SLEEP_MODEM_IEEE802154);
+#endif
     return ret;
 }
 
 esp_err_t ieee802154_mac_deinit(void)
 {
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+    esp_phy_modem_deinit(SLEEP_MODEM_IEEE802154);
+#endif
     esp_err_t ret = ESP_OK;
 #if CONFIG_ESP_COEX_EXTERNAL_COEXIST_ENABLE
     esp_coex_ieee802154_force_rx_enable(false);
@@ -953,7 +969,9 @@ esp_err_t ieee802154_mac_deinit(void)
     if (s_ieee802154_isr_handle) {
         ret = esp_intr_free(s_ieee802154_isr_handle);
         s_ieee802154_isr_handle = NULL;
-        ESP_RETURN_ON_FALSE(ret == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC ISR deinit failed");
+        if (unlikely(ret != ESP_OK)) {
+            ESP_LOGE(IEEE802154_TAG, "%s(%d): IEEE802154 MAC ISR deinit failed", __FUNCTION__, __LINE__);
+        }
     }
     ESP_RETURN_ON_FALSE(ieee802154_sleep_deinit() == ESP_OK, ESP_FAIL, IEEE802154_TAG, "IEEE802154 MAC sleep deinit failed");
     return ret;
diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
index 1f3ee7b9f10..232f8eb1f88 100644
--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -1419,6 +1419,10 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
     bool
     default y
 
+config SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+    bool
+    default y
+
 config SOC_PM_SUPPORT_PMU_MODEM_STATE
     bool
     default y
@@ -1455,6 +1459,10 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
     bool
     default y
 
+config SOC_PM_PAU_REGDMA_LINK_MODEM
+    bool
+    default y
+
 config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
     bool
     default y
diff --git a/components/soc/esp32c6/include/soc/retention_periph_defs.h b/components/soc/esp32c6/include/soc/retention_periph_defs.h
index 1b30218bbb9..ad485f09998 100644
--- a/components/soc/esp32c6/include/soc/retention_periph_defs.h
+++ b/components/soc/esp32c6/include/soc/retention_periph_defs.h
@@ -54,6 +54,7 @@ typedef enum periph_retention_module {
     SLEEP_RETENTION_MODULE_BLE_MAC      = 28,
     SLEEP_RETENTION_MODULE_BT_BB        = 29,
     SLEEP_RETENTION_MODULE_802154_MAC   = 30,
+    SLEEP_RETENTION_MODULE_PHY_FE       = 31,
 
     SLEEP_RETENTION_MODULE_MAX          = SOC_PM_RETENTION_MODULE_NUM - 1
 } periph_retention_module_t;
diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h
index 5999495327f..2d998d465fd 100644
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -552,7 +552,8 @@
 #define SOC_PM_SUPPORT_MAC_BB_PD        (1)
 #define SOC_PM_SUPPORT_RTC_PERIPH_PD    (1)
 
-#define SOC_PM_SUPPORT_PMU_MODEM_STATE  (1)
+#define SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY (1)
+#define SOC_PM_SUPPORT_PMU_MODEM_STATE      (1)
 /* macro redefine for pass esp_wifi headers md5sum check */
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE
 
@@ -568,6 +569,7 @@
 
 #define SOC_PM_PAU_LINK_NUM                 (4)
 #define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR   (1)
+#define SOC_PM_PAU_REGDMA_LINK_MODEM        (1)
 #define SOC_PM_PAU_REGDMA_LINK_WIFIMAC      (1)
 
 #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE  (1)
diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
index 028e178dc0c..e9455a8a01b 100644
--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@@ -1415,7 +1415,7 @@ config SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR
     bool
     default y
 
-config SOC_PM_PAU_REGDMA_LINK_WIFIMAC
+config SOC_PM_PAU_REGDMA_LINK_MODEM
     bool
     default y
 
diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h
index 7ee548e1b1b..ce6be19ed0d 100644
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@@ -570,7 +570,7 @@
 
 #define SOC_PM_PAU_LINK_NUM                 (4)
 #define SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR   (1)
-#define SOC_PM_PAU_REGDMA_LINK_WIFIMAC      (1)
+#define SOC_PM_PAU_REGDMA_LINK_MODEM      (1)
 
 #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE  (1)