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Merge branch 'feat/ap_quad_psram_ecc_c61_c5' into 'master'

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psram: add quad psram error correcting code (ECC) feature on ESP32C61/C5

Closes IDF-12027

See merge request espressif/esp-idf!36465
This commit is contained in:
Armando (Dou Yiwen)
2025-01-20 14:12:39 +08:00
parent 94effc1c0f 8a654ffce1
commit cc1819200d
9 changed files with 669 additions and 118 deletions
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components/hal/esp32s3/include/hal/psram_ctrlr_ll.h
+1 -1
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@@ -109,7 +109,7 @@ static inline void psram_ctrlr_ll_set_rd_dummy(uint32_t mspi_id, uint32_t dummy_
* @param mspi_id mspi_id
* @param read_mode read mode
*/
static inline void psram_ctrlr_ll_set_read_mode(uint32_t mspi_id, psram_hal_cmd_mode_t read_mode)
static inline void psram_ctrlr_ll_set_read_mode(uint32_t mspi_id, psram_cmd_mode_t read_mode)
{
typeof (SPIMEM0.cache_sctrl) cache_sctrl;
cache_sctrl.val = SPIMEM0.cache_sctrl.val;