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feat(esp32p4): add eco1 revision config option

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This commit is contained in:
Xiao Xufeng
2024-05-11 11:46:08 +08:00
parent f1d1dfd1ef
commit cbcd346171
4 changed files with 16 additions and 13 deletions
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components/esp_hw_support/port/esp32p4/Kconfig.hw_support
+3
View File
@@ -11,11 +11,14 @@ choice ESP32P4_REV_MIN
config ESP32P4_REV_MIN_0
bool "Rev v0.0"
config ESP32P4_REV_MIN_1
bool "Rev v0.1"
endchoice
config ESP32P4_REV_MIN_FULL
int
default 0 if ESP32P4_REV_MIN_0
default 1 if ESP32P4_REV_MIN_1
config ESP_REV_MIN_FULL
int
components/esp_hw_support/port/esp32p4/pmu_sleep.c
+2 -1
View File
@@ -12,6 +12,7 @@
#include "esp_err.h"
#include "esp_attr.h"
#include "esp_private/regi2c_ctrl.h"
#include "soc/chip_revision.h"
#include "soc/soc.h"
#include "soc/regi2c_syspll.h"
#include "soc/regi2c_cpll.h"
@@ -319,7 +320,7 @@ TCM_IRAM_ATTR bool pmu_sleep_finish(void)
pmu_sleep_shutdown_ldo();
unsigned chip_version = efuse_hal_chip_revision();
if (chip_version == 0) {
if (!ESP_CHIP_REV_ABOVE(chip_version, 1)) {
REGI2C_WRITE_MASK(I2C_CPLL, I2C_CPLL_OC_DIV_7_0, 6); // lower default cpu_pll freq to 400M
REGI2C_WRITE_MASK(I2C_SYSPLL, I2C_SYSPLL_OC_DIV_7_0, 8); // lower default sys_pll freq to 480M
}