Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'fix/adc_monitor_error_on_ch8_9_on_s3_v6.0' into 'release/v6.0'

Browse Source 
Fix ADC Continuous Monitor Callback Failure for ADC1 Channels 8/9 on ESP32-S3 (v6.0)

See merge request espressif/esp-idf!49505
This commit is contained in:
Jiang Jiang Jian
2026-06-29 15:39:32 +08:00
parent e3ef21aa13 d51f64d719
commit ca1bcb0c72
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hal_ana_conv/esp32s3/include/hal/adc_ll.h
+2 -2
View File
@@ -490,11 +490,11 @@ static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit
static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh) static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh)
{ {
if (monitor_id == ADC_MONITOR_0) { if (monitor_id == ADC_MONITOR_0) {
APB_SARADC.thres0_ctrl.thres0_channel = (adc_n << 3) | (channel & 0x7); APB_SARADC.thres0_ctrl.thres0_channel = (adc_n << 4) | (channel & 0xF);
APB_SARADC.thres0_ctrl.thres0_high = h_thresh; APB_SARADC.thres0_ctrl.thres0_high = h_thresh;
APB_SARADC.thres0_ctrl.thres0_low = l_thresh; APB_SARADC.thres0_ctrl.thres0_low = l_thresh;
} else { // ADC_MONITOR_1 } else { // ADC_MONITOR_1
APB_SARADC.thres1_ctrl.thres1_channel = (adc_n << 3) | (channel & 0x7); APB_SARADC.thres1_ctrl.thres1_channel = (adc_n << 4) | (channel & 0xF);
APB_SARADC.thres1_ctrl.thres1_high = h_thresh; APB_SARADC.thres1_ctrl.thres1_high = h_thresh;
APB_SARADC.thres1_ctrl.thres1_low = l_thresh; APB_SARADC.thres1_ctrl.thres1_low = l_thresh;
} }