update(pmu_sleep): enable SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED

components/soc/esp32s31/include/soc/Kconfig.soc_caps.in

@@ -1539,6 +1539,10 @@ config SOC_PM_SUPPORT_PMU_MODEM_STATE
     bool
     default y
 
+config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED
+    bool
+    default y
+
 config SOC_PM_RETENTION_MODULE_NUM
     int
     default 64

components/soc/esp32s31/include/soc/soc_caps.h

@@ -573,6 +573,19 @@
 #define SOC_PM_SUPPORT_PMU_MODEM_STATE             (1)
 #define MAC_SUPPORT_PMU_MODEM_STATE                SOC_PM_SUPPORT_PMU_MODEM_STATE
 
+/*
+ * min_slp_val is derived from slow clock period (450us / slow_clk).
+ * With internal slow clock, frequency drift may cause min_slp_val to vary.
+ * If the updated value becomes larger than the previous one, modem wakeup
+ * path may still use the old value, leading to inconsistent PMU timing and
+ * potential modem state hang.
+ *
+ * Therefore, when using internal slow clock, min_slp_val is fixed after init,
+ * and clock drift is handled via separate timing compensation instead of
+ * updating this PMU threshold dynamically.
+ */
+#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED    (1)
+
 #define SOC_PM_RETENTION_MODULE_NUM         (64)
 
 /*-------------------------- LP_CORE CAPS ------------------------------------*/