From c86ac064248552d1a1a99dbe84f0131156a89fd7 Mon Sep 17 00:00:00 2001
From: cjin <jinchen@espressif.com>
Date: Tue, 4 Aug 2026 10:34:06 +0800
Subject: [PATCH] feat(pau): added etm regdma related api

---
 .../esp_hal_pmu/esp32h4/include/hal/pau_ll.h    | 17 ++++++++++++++++-
 components/esp_hal_pmu/esp32h4/pau_hal.c        | 13 +++++++++++++
 .../esp_hal_pmu/esp32s31/include/hal/pau_ll.h   | 15 +++++++++++++++
 components/esp_hal_pmu/esp32s31/pau_hal.c       | 13 +++++++++++++
 components/esp_hal_pmu/include/hal/pau_hal.h    | 16 ++++++++++++++++
 .../include/esp_private/esp_pau.h               | 17 +++++++++++++++++
 components/esp_hw_support/port/pau_regdma.c     | 17 +++++++++++++++++
 7 files changed, 107 insertions(+), 1 deletion(-)

diff --git a/components/esp_hal_pmu/esp32h4/include/hal/pau_ll.h b/components/esp_hal_pmu/esp32h4/include/hal/pau_ll.h
index 4f7bbf77168..2e4f42463dc 100644
--- a/components/esp_hal_pmu/esp32h4/include/hal/pau_ll.h
+++ b/components/esp_hal_pmu/esp32h4/include/hal/pau_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -222,6 +222,21 @@ static inline void pau_ll_set_regdma_link_wait_read_interval(int interval)
     HAL_FORCE_MODIFY_U32_REG_FIELD(LP_AON.backup_dma_cfg0, aon_read_interval_aon, interval);
 }
 
+static inline void pau_ll_select_regdma_etm_entry_link0(pau_dev_t *dev, int link)
+{
+    dev->regdma_etm_ctrl.etm_link_sel_0 &= ~0xF;
+    dev->regdma_etm_ctrl.etm_link_sel_0 |= (link & 0xF);
+}
+
+static inline void pau_ll_set_regdma_etm_entry_link0_backup_direction(pau_dev_t *dev, bool to_mem)
+{
+    if (to_mem) {
+        dev->regdma_etm_ctrl.etm_link_sel_0 |= BIT(4);
+    } else {
+        dev->regdma_etm_ctrl.etm_link_sel_0 &= ~BIT(4);
+    }
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/esp_hal_pmu/esp32h4/pau_hal.c b/components/esp_hal_pmu/esp32h4/pau_hal.c
index 8c7c96189d7..b989c6fe5dd 100644
--- a/components/esp_hal_pmu/esp32h4/pau_hal.c
+++ b/components/esp_hal_pmu/esp32h4/pau_hal.c
@@ -90,3 +90,16 @@ void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int inte
     pau_ll_set_regdma_link_wait_retry_count(count);
     pau_ll_set_regdma_link_wait_read_interval(interval);
 }
+
+void IRAM_ATTR pau_hal_set_etm_modem_link_config(pau_hal_context_t *hal)
+{
+    pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
+    pau_ll_select_regdma_etm_entry_link0(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY);
+    pau_ll_set_regdma_etm_entry_link0_backup_direction(hal->dev, false);
+}
+
+void IRAM_ATTR pau_hal_stop_etm_modem_link(pau_hal_context_t *hal)
+{
+    pau_ll_select_regdma_etm_entry_link0(hal->dev, 0); /* restore link select to default */
+    pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
+}
diff --git a/components/esp_hal_pmu/esp32s31/include/hal/pau_ll.h b/components/esp_hal_pmu/esp32s31/include/hal/pau_ll.h
index 87f4ed0a617..9d34b48c0f2 100644
--- a/components/esp_hal_pmu/esp32s31/include/hal/pau_ll.h
+++ b/components/esp_hal_pmu/esp32s31/include/hal/pau_ll.h
@@ -124,6 +124,21 @@ static inline void pau_ll_clear_regdma_backup_error_intr_state(pau_dev_t *dev)
     dev->int_clr.error_int_clr = 1;
 }
 
+static inline void pau_ll_select_regdma_etm_entry_link0(pau_dev_t *dev, int link)
+{
+    dev->regdma_etm_ctrl.etm_link_sel_0 &= ~0x7;
+    dev->regdma_etm_ctrl.etm_link_sel_0 |= (link & 0x7);
+}
+
+static inline void pau_ll_set_regdma_etm_entry_link0_backup_direction(pau_dev_t *dev, bool to_mem)
+{
+    if (to_mem) {
+        dev->regdma_etm_ctrl.etm_link_sel_0 |= BIT(3);
+    } else {
+        dev->regdma_etm_ctrl.etm_link_sel_0 &= ~BIT(3);
+    }
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/esp_hal_pmu/esp32s31/pau_hal.c b/components/esp_hal_pmu/esp32s31/pau_hal.c
index 682d85b3541..a9551baca74 100644
--- a/components/esp_hal_pmu/esp32s31/pau_hal.c
+++ b/components/esp_hal_pmu/esp32s31/pau_hal.c
@@ -109,3 +109,16 @@ void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int inte
     lp_sys_ll_set_pau_link_wait_tout_thres(count);
     lp_sys_ll_set_pau_reg_read_interval(interval);
 }
+
+void IRAM_ATTR pau_hal_set_etm_modem_link_config(pau_hal_context_t *hal)
+{
+    pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
+    pau_ll_select_regdma_etm_entry_link0(hal->dev, SOC_PM_PAU_REGDMA_LINK_IDX_PHY);
+    pau_ll_set_regdma_etm_entry_link0_backup_direction(hal->dev, false);
+}
+
+void IRAM_ATTR pau_hal_stop_etm_modem_link(pau_hal_context_t *hal)
+{
+    pau_ll_select_regdma_etm_entry_link0(hal->dev, 0); /* restore link select to default */
+    pau_ll_clear_regdma_backup_done_intr_state(hal->dev);
+}
diff --git a/components/esp_hal_pmu/include/hal/pau_hal.h b/components/esp_hal_pmu/include/hal/pau_hal.h
index 2494c0e7bf6..eced82f2279 100644
--- a/components/esp_hal_pmu/include/hal/pau_hal.h
+++ b/components/esp_hal_pmu/include/hal/pau_hal.h
@@ -213,6 +213,22 @@ void pau_hal_set_regdma_wait_timeout(pau_hal_context_t *hal, int count, int inte
 void pau_hal_lp_sys_initialize(void);
 #endif
 
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+/**
+ * @brief Set the configuration of the REGDMA etm modem link
+ *
+ * @param hal           regdma hal context
+ */
+void pau_hal_set_etm_modem_link_config(pau_hal_context_t *hal);
+
+/**
+ * @brief Stop transmission on REGDMA etm modem link
+ *
+ * @param hal           regdma hal context
+ */
+void pau_hal_stop_etm_modem_link(pau_hal_context_t *hal);
+#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+
 #endif
 
 #ifdef __cplusplus
diff --git a/components/esp_hw_support/include/esp_private/esp_pau.h b/components/esp_hw_support/include/esp_private/esp_pau.h
index 2a4e8a78bcf..ac6b456a8b3 100644
--- a/components/esp_hw_support/include/esp_private/esp_pau.h
+++ b/components/esp_hw_support/include/esp_private/esp_pau.h
@@ -157,6 +157,23 @@ void pau_regdma_register_modem_link_protect(pau_regdma_modem_link_protect_cb_t c
 void pau_regdma_unregister_modem_link_protect(void);
 #endif // SOC_PM_REGDMA_MODEM_LINK_PROTECT
 
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+/**
+ * @brief Wait for REGDMA to complete
+ */
+void pau_regdma_wait_done(void);
+
+/**
+ * @brief Set the configuration of the REGDMA etm modem link
+ */
+void pau_regdma_set_etm_modem_link_config(void);
+
+/**
+ * @brief Stop transmission on REGDMA etm modem link
+ */
+void pau_regdma_stop_etm_modem_link(void);
+#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/esp_hw_support/port/pau_regdma.c b/components/esp_hw_support/port/pau_regdma.c
index a64c43c80e0..0db2684e3c4 100644
--- a/components/esp_hw_support/port/pau_regdma.c
+++ b/components/esp_hw_support/port/pau_regdma.c
@@ -234,3 +234,20 @@ bool IRAM_ATTR pau_regdma_enable_aon_link_entry(bool enable)
     return origin_bypass_en;
 }
 #endif
+
+#if SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY
+void IRAM_ATTR pau_regdma_set_etm_modem_link_config(void)
+{
+    pau_hal_set_etm_modem_link_config(PAU_instance()->hal);
+}
+
+void IRAM_ATTR pau_regdma_stop_etm_modem_link(void)
+{
+    pau_hal_stop_etm_modem_link(PAU_instance()->hal);
+}
+
+void IRAM_ATTR pau_regdma_wait_done(void)
+{
+    pau_hal_regdma_wait_done(PAU_instance()->hal);
+}
+#endif // SOC_PM_SUPPORT_REGDMA_TRIGGERED_PHY