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feat(mspi): support 120MHz flash and psram for esp32c61
This commit is contained in:
committed by
Zhang Wen Xu
parent
3b21e8e659
commit
c7ae253b89
@@ -711,22 +711,6 @@ config SOC_SPI_MEM_SUPPORT_WRAP
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bool
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default y
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config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
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bool
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default y
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config SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
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bool
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default y
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config SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED
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bool
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default y
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config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
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bool
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default y
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config SOC_SYSTIMER_COUNTER_NUM
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int
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default 2
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@@ -320,11 +320,6 @@
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#define SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE (1)
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#define SOC_SPI_MEM_SUPPORT_WRAP (1)
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#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
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#define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
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#define SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
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#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
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/*-------------------------- SYSTIMER CAPS ----------------------------------*/
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#define SOC_SYSTIMER_COUNTER_NUM 2 // Number of counter units
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#define SOC_SYSTIMER_ALARM_NUM 3 // Number of alarm units
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