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Merge branch 'feature/esp32p4_sleep_cpu_retention_support' into 'master'
feat(esp_hw_support): esp32p4 sleep support (Stage 2: support dualcore software sleep retention 🔋) See merge request espressif/esp-idf!28485
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -28,26 +28,30 @@
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extern "C" {
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#endif
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#if SOC_PM_SUPPORT_TAGMEM_PD
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typedef struct rtc_cntl_sleep_cache_tag_retent {
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void *link_addr; /* Internal ram address for tagmem retention */
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struct {
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uint32_t start_point: 8, /* the row of start for i-cache tag memory */
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vld_size: 8, /* valid size of i-cache tag memory, unit: 4 i-cache tagmem blocks */
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size: 8, /* i-cache tag memory size, unit: 4 i-cache tagmem blocks */
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enable: 1; /* enable or disable i-cache tagmem retention */
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} icache;
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struct {
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uint32_t start_point: 9, /* the row of start for d-cache tag memory */
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vld_size: 9, /* valid size of d-cache tag memory, unit: 4 d-cache tagmem blocks */
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size: 9, /* d-cache tag memory size, unit: 4 d-cache tagmem blocks */
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enable: 1; /* enable or disable d-cache tagmem retention */
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} dcache;
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} rtc_cntl_sleep_cache_tag_retent_t;
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#endif
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typedef struct rtc_cntl_sleep_retent {
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#if SOC_PM_SUPPORT_CPU_PD
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void *cpu_pd_mem; /* Internal ram address for cpu retention */
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void *cpu_pd_mem; /* Internal ram address for cpu retention */
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#endif // SOC_PM_SUPPORT_CPU_PD
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#if SOC_PM_SUPPORT_TAGMEM_PD
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struct {
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void *link_addr; /* Internal ram address for tagmem retention */
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struct {
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uint32_t start_point: 8, /* the row of start for i-cache tag memory */
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vld_size: 8, /* valid size of i-cache tag memory, unit: 4 i-cache tagmem blocks */
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size: 8, /* i-cache tag memory size, unit: 4 i-cache tagmem blocks */
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enable: 1; /* enable or disable i-cache tagmem retention */
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} icache;
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struct {
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uint32_t start_point: 9, /* the row of start for d-cache tag memory */
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vld_size: 9, /* valid size of d-cache tag memory, unit: 4 d-cache tagmem blocks */
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size: 9, /* d-cache tag memory size, unit: 4 d-cache tagmem blocks */
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enable: 1; /* enable or disable d-cache tagmem retention */
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} dcache;
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} tagmem;
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rtc_cntl_sleep_cache_tag_retent_t tagmem; /* I/D Cache tag memory retention information */
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#endif // SOC_PM_SUPPORT_TAGMEM_PD
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} rtc_cntl_sleep_retent_t;
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