fix(esp_rom): Patch ets_ecdsa_verify() to include signature bounds check

components/esp_rom/esp32c61/Kconfig.soc_caps.in

@@ -107,6 +107,10 @@ config ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY
     bool
     default y
 
+config ESP_ROM_ECDSA_VERIFY_PATCH
+    bool
+    default y
+
 config ESP_ROM_DELAY_US_PATCH
     bool
     default y

components/esp_rom/esp32c61/esp_rom_caps.h

@@ -32,6 +32,7 @@
 #define ESP_ROM_USB_OTG_NUM                 (-1) // No USB_OTG CDC in the ROM, set -1 for Kconfig usage.
 #define ESP_ROM_HAS_OUTPUT_PUTC_FUNC        (1) // ROM has esp_rom_output_putc (or ets_write_char_uart)
 #define ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY  (1) // ROM mem/str functions are not optimized well for misaligned memory access.
+#define ESP_ROM_ECDSA_VERIFY_PATCH (1) // ROM ets_ecdsa_verify API requires a software patch
 #define ESP_ROM_DELAY_US_PATCH              (1) // ROM ets_delay_us needs patch for U-mode operation
 #define ESP_ROM_BOOTLOADER_OFFSET_FLASH     (0x0) // Bootloader offset in flash determined by the ROM bootloader
 #define ESP_ROM_CACHE_WRITEBACK_NEEDS_SYNC_TWICE_NO_MAP (1) // ROM cache writeback related needs patch to avoid sync loss, no map parameter

components/esp_rom/esp32c61/ld/esp32c61.rom.ld

@@ -370,7 +370,7 @@ ets_efuse_usb_device_disabled = 0x40000808;
  ***************************************/
 
 /* Functions */
-ets_ecdsa_verify = 0x40000810;
+_rom_ets_ecdsa_verify = 0x40000810;
 ets_secure_boot_verify_bootloader_with_keys = 0x40000814;
 ets_secure_boot_verify_signature = 0x40000818;
 ets_secure_boot_read_key_digests = 0x4000081c;