From c5c76ad1b7593436bde6afbe2ee3e846efc5c2e7 Mon Sep 17 00:00:00 2001 From: wanckl Date: Tue, 6 Jan 2026 17:22:43 +0800 Subject: [PATCH] fix(driver_spi): master set idle pin level for all data pin --- .../include/esp_private/spi_common_internal.h | 8 +++----- components/esp_driver_spi/src/gpspi/spi_master.c | 2 +- components/hal/esp32c2/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32c3/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32c5/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32c6/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32c61/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32h2/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32h21/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32p4/include/hal/spi_ll.h | 11 +++++++---- components/hal/esp32s2/include/hal/spi_ll.h | 9 +++++---- components/hal/esp32s3/include/hal/spi_ll.h | 11 +++++++---- components/hal/include/hal/spi_hal.h | 4 ++-- components/hal/spi_hal.c | 4 ++-- 14 files changed, 76 insertions(+), 50 deletions(-) diff --git a/components/esp_driver_spi/include/esp_private/spi_common_internal.h b/components/esp_driver_spi/include/esp_private/spi_common_internal.h index ba0a11a692c..20081b1b463 100644 --- a/components/esp_driver_spi/include/esp_private/spi_common_internal.h +++ b/components/esp_driver_spi/include/esp_private/spi_common_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,17 +9,15 @@ #pragma once #include +#include "esp_pm.h" #include "driver/spi_common.h" #include "freertos/FreeRTOS.h" #include "hal/spi_types.h" #include "hal/dma_types.h" #include "soc/ext_mem_defs.h" //for SOC_NON_CACHEABLE_OFFSET #include "esp_private/spi_dma.h" -#include "esp_pm.h" -#include "esp_private/spi_share_hw_ctrl.h" -#if SOC_GDMA_SUPPORTED #include "esp_private/gdma.h" -#endif +#include "esp_private/spi_share_hw_ctrl.h" #ifdef __cplusplus extern "C" diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c index 2e53da05503..2fa5e017246 100644 --- a/components/esp_driver_spi/src/gpspi/spi_master.c +++ b/components/esp_driver_spi/src/gpspi/spi_master.c @@ -339,7 +339,7 @@ static esp_err_t spi_master_init_driver(spi_host_device_t host_id) spi_ll_enable_clock(host_id, true); } spi_hal_init(&host->hal, host_id); - spi_hal_config_io_default_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); + spi_hal_set_data_pin_idle_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); if (host_id != SPI1_HOST) { //SPI1 attributes are already initialized at start up. diff --git a/components/hal/esp32c2/include/hal/spi_ll.h b/components/hal/esp32c2/include/hal/spi_ll.h index 68cac82ca71..d153f652728 100644 --- a/components/hal/esp32c2/include/hal/spi_ll.h +++ b/components/hal/esp32c2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -245,13 +245,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32c3/include/hal/spi_ll.h b/components/hal/esp32c3/include/hal/spi_ll.h index 998e19c5cf4..4f39421b406 100644 --- a/components/hal/esp32c3/include/hal/spi_ll.h +++ b/components/hal/esp32c3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -247,13 +247,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32c5/include/hal/spi_ll.h b/components/hal/esp32c5/include/hal/spi_ll.h index 897e979494f..99a4fedf970 100644 --- a/components/hal/esp32c5/include/hal/spi_ll.h +++ b/components/hal/esp32c5/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -898,13 +898,16 @@ static inline void spi_ll_master_set_cs_setup(spi_dev_t *hw, uint8_t setup) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /*------------------------------------------------------------------------------ diff --git a/components/hal/esp32c6/include/hal/spi_ll.h b/components/hal/esp32c6/include/hal/spi_ll.h index c55b9e2283a..ef1afb0e3d2 100644 --- a/components/hal/esp32c6/include/hal/spi_ll.h +++ b/components/hal/esp32c6/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -238,13 +238,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32c61/include/hal/spi_ll.h b/components/hal/esp32c61/include/hal/spi_ll.h index 6a6918a63fd..64b8a2a90fa 100644 --- a/components/hal/esp32c61/include/hal/spi_ll.h +++ b/components/hal/esp32c61/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32h2/include/hal/spi_ll.h b/components/hal/esp32h2/include/hal/spi_ll.h index ec5219583e9..c517344a83d 100644 --- a/components/hal/esp32h2/include/hal/spi_ll.h +++ b/components/hal/esp32h2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -239,13 +239,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32h21/include/hal/spi_ll.h b/components/hal/esp32h21/include/hal/spi_ll.h index c4e7caba824..c3d049d6751 100644 --- a/components/hal/esp32h21/include/hal/spi_ll.h +++ b/components/hal/esp32h21/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -225,13 +225,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32p4/include/hal/spi_ll.h b/components/hal/esp32p4/include/hal/spi_ll.h index d5f335087e1..59763dc1d16 100644 --- a/components/hal/esp32p4/include/hal/spi_ll.h +++ b/components/hal/esp32p4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -916,13 +916,16 @@ static inline void spi_ll_set_mosi_delay(spi_dev_t *hw, int delay_mode, int dela } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/esp32s2/include/hal/spi_ll.h b/components/hal/esp32s2/include/hal/spi_ll.h index b55bb8c0466..85c538cde00 100644 --- a/components/hal/esp32s2/include/hal/spi_ll.h +++ b/components/hal/esp32s2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -263,13 +263,14 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; } /** diff --git a/components/hal/esp32s3/include/hal/spi_ll.h b/components/hal/esp32s3/include/hal/spi_ll.h index a318f40a866..c58cbe4b693 100644 --- a/components/hal/esp32s3/include/hal/spi_ll.h +++ b/components/hal/esp32s3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -256,13 +256,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/hal/include/hal/spi_hal.h b/components/hal/include/hal/spi_hal.h index 3dacc434c86..52832e48d0f 100644 --- a/components/hal/include/hal/spi_hal.h +++ b/components/hal/include/hal/spi_hal.h @@ -172,12 +172,12 @@ typedef struct { void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id); /** - * Config default output IO level when don't have transaction + * Config default output data IO level when bus idle * * @param hal Context of the HAL layer. * @param level IO level to config */ -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level); +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level); /** * Deinit the peripheral (and the context if needed). diff --git a/components/hal/spi_hal.c b/components/hal/spi_hal.c index 1e653663695..f46b43bc2e3 100644 --- a/components/hal/spi_hal.c +++ b/components/hal/spi_hal.c @@ -27,11 +27,11 @@ void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id) spi_ll_apply_config(hw); } -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level) +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level) { #if SPI_LL_MOSI_FREE_LEVEL // Config default output data line level when don't have transaction - spi_ll_set_mosi_free_level(hal->hw, level); + spi_ll_set_data_pin_idle_level(hal->hw, level); spi_ll_apply_config(hal->hw); #endif }