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feat(ulp): support interrupts for C6/P4 LP core

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Closes https://github.com/espressif/esp-idf/issues/13059
This commit is contained in:
Marius Vikhammer
2024-04-28 17:03:23 +08:00
parent 73190dd04e
commit c5a513cf49
34 changed files with 796 additions and 32 deletions
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components/hal/esp32c6/include/hal/lp_core_ll.h
+11
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@@ -12,6 +12,7 @@
#pragma once
#include <stdbool.h>
#include <stdint.h>
#include "soc/lpperi_struct.h"
#include "soc/pmu_struct.h"
#include "soc/lp_aon_struct.h"
@@ -125,6 +126,16 @@ static inline void lp_core_ll_request_sleep(void)
PMU.lp_ext.pwr1.sleep_req = 1;
}
/**
* @brief Get which interrupts have triggered on the LP core
*
* @return uint8_t bit mask of triggered LP interrupt sources
*/
static inline uint8_t lp_core_ll_get_triggered_interrupt_srcs(void)
{
return LPPERI.interrupt_source.lp_interrupt_source;
}
#ifdef __cplusplus
}
#endif
components/hal/esp32c6/include/hal/pmu_ll.h
+10
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@@ -541,6 +541,16 @@ FORCE_INLINE_ATTR void pmu_ll_lp_clear_intsts_mask(pmu_dev_t *hw, uint32_t mask)
hw->lp_ext.int_clr.val = mask;
}
FORCE_INLINE_ATTR void pmu_ll_lp_clear_sw_intr_status(pmu_dev_t *hw)
{
hw->lp_ext.int_clr.sw_trigger = 1;
}
FORCE_INLINE_ATTR void pmu_ll_lp_enable_sw_intr(pmu_dev_t *hw, bool enable)
{
hw->lp_ext.int_ena.sw_trigger = enable;
}
FORCE_INLINE_ATTR void pmu_ll_lp_set_min_sleep_cycle(pmu_dev_t *hw, uint32_t slow_clk_cycle)
{
hw->wakeup.cntl3.lp_min_slp_val = slow_clk_cycle;
components/hal/esp32c6/include/hal/rtc_io_ll.h
+21
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@@ -40,6 +40,15 @@ typedef enum {
RTCIO_LL_WAKEUP_HIGH_LEVEL = 0x5, /*!< GPIO interrupt type : input high level trigger */
} rtcio_ll_wake_type_t;
typedef enum {
RTCIO_INTR_DISABLE = 0, /*!< Disable GPIO interrupt */
RTCIO_INTR_POSEDGE = 1, /*!< GPIO interrupt type : rising edge */
RTCIO_INTR_NEGEDGE = 2, /*!< GPIO interrupt type : falling edge */
RTCIO_INTR_ANYEDGE = 3, /*!< GPIO interrupt type : both rising and falling edge */
RTCIO_INTR_LOW_LEVEL = 4, /*!< GPIO interrupt type : input low level trigger */
RTCIO_INTR_HIGH_LEVEL = 5, /*!< GPIO interrupt type : input high level trigger */
} rtcio_ll_intr_type_t;
typedef enum {
RTCIO_LL_OUTPUT_NORMAL = 0, /*!< RTCIO output mode is normal. */
RTCIO_LL_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */
@@ -316,6 +325,18 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
LP_IO.pin[rtcio_num].int_type = RTCIO_LL_WAKEUP_DISABLE;
}
/**
* Enable interrupt function and set interrupt type
*
* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
* @param type Interrupt type on high level or low level.
*/
static inline void rtcio_ll_intr_enable(int rtcio_num, rtcio_ll_intr_type_t type)
{
LP_IO.pin[rtcio_num].int_type = type;
}
/**
* Enable rtc io output in deep sleep.
*
components/hal/esp32p4/include/hal/pmu_ll.h
+10
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@@ -30,6 +30,16 @@ FORCE_INLINE_ATTR void pmu_ll_lp_clear_intsts_mask(pmu_dev_t *hw, uint32_t mask)
hw->lp_ext.int_clr.val = mask;
}
FORCE_INLINE_ATTR void pmu_ll_lp_clear_sw_intr_status(pmu_dev_t *hw)
{
hw->lp_ext.int_clr.hp_sw_trigger = 1;
}
FORCE_INLINE_ATTR void pmu_ll_lp_enable_sw_intr(pmu_dev_t *hw, bool enable)
{
hw->lp_ext.int_ena.hp_sw_trigger = enable;
}
FORCE_INLINE_ATTR void pmu_ll_hp_set_dig_power(pmu_dev_t *hw, pmu_hp_mode_t mode, uint32_t flag)
{
hw->hp_sys[mode].dig_power.val = flag;
components/hal/esp32p4/include/hal/rtc_io_ll.h
+21 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -39,6 +39,15 @@ typedef enum {
RTCIO_LL_WAKEUP_HIGH_LEVEL = 0x5, /*!< GPIO interrupt type : input high level trigger */
} rtcio_ll_wake_type_t;
typedef enum {
RTCIO_INTR_DISABLE = 0, /*!< Disable GPIO interrupt */
RTCIO_INTR_POSEDGE = 1, /*!< GPIO interrupt type : rising edge */
RTCIO_INTR_NEGEDGE = 2, /*!< GPIO interrupt type : falling edge */
RTCIO_INTR_ANYEDGE = 3, /*!< GPIO interrupt type : both rising and falling edge */
RTCIO_INTR_LOW_LEVEL = 4, /*!< GPIO interrupt type : input low level trigger */
RTCIO_INTR_HIGH_LEVEL = 5, /*!< GPIO interrupt type : input high level trigger */
} rtcio_ll_intr_type_t;
typedef enum {
RTCIO_LL_OUTPUT_NORMAL = 0, /*!< RTCIO output mode is normal. */
RTCIO_LL_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */
@@ -341,6 +350,17 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
LP_GPIO.pin[rtcio_num].int_type = RTCIO_LL_WAKEUP_DISABLE;
}
/**
* Enable interrupt function and set interrupt type
*
* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
* @param type Interrupt type on high level or low level.
*/
static inline void rtcio_ll_intr_enable(int rtcio_num, rtcio_ll_intr_type_t type)
{
LP_GPIO.pin[rtcio_num].int_type = type;
}
/**
* @brief Enable RTCIO output in deep sleep.
*