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Merge branch 'feature/apply_new_version_logic' into 'master'

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all: Apply new version logic (major * 100 + minor)

Closes IDF-4932 and IDF-4939

See merge request espressif/esp-idf!18787
This commit is contained in:
Michael (XIAO Xufeng)
2022-11-04 16:01:32 +08:00
parent b14116ff95 f2aa736c7b
commit c546de8d82
74 changed files with 724 additions and 163 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/Kconfig
+6 -3
View File
@@ -1,4 +1,10 @@
menu "Hardware Settings"
menu "Chip revision"
# Insert chip-specific HW config
orsource "./port/$IDF_TARGET/Kconfig.hw_support"
endmenu
orsource "./port/$IDF_TARGET/Kconfig.spiram"
menu "MAC Config"
@@ -183,9 +189,6 @@ menu "Hardware Settings"
default 0x10000 if MMU_PAGE_SIZE_64KB
endmenu
# Insert chip-specific HW config
orsource "./port/$IDF_TARGET/Kconfig.hw_support"
menu "GDMA Configuration"
depends on SOC_GDMA_SUPPORTED
config GDMA_CTRL_FUNC_IN_IRAM
components/esp_hw_support/port/esp32/Kconfig.hw_support
+50 -8
View File
@@ -2,25 +2,67 @@ choice ESP32_REV_MIN
prompt "Minimum Supported ESP32 Revision"
default ESP32_REV_MIN_0
help
Minimum revision that ESP-IDF would support.
ESP-IDF performs different strategy on different esp32 revision.
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32_REV_MIN_0
bool "Rev 0"
bool "Rev v0.0 (ECO0)"
# Brownout on Rev 0 is bugged, must use interrupt
select ESP_SYSTEM_BROWNOUT_INTR
config ESP32_REV_MIN_1
bool "Rev 1"
bool "Rev v1.0 (ECO1)"
config ESP32_REV_MIN_1_1
bool "Rev v1.1 (ECO1.1)"
config ESP32_REV_MIN_2
bool "Rev 2"
bool "Rev v2.0 (ECO2)"
config ESP32_REV_MIN_3
bool "Rev 3"
bool "Rev v3.0 (ECO3)"
select ESP_INT_WDT if ESP32_ECO3_CACHE_LOCK_FIX
config ESP32_REV_MIN_3_1
bool "Rev v3.1 (ECO4)"
select ESP_INT_WDT if ESP32_ECO3_CACHE_LOCK_FIX
endchoice
config ESP32_REV_MIN
# we keep it for compatibility. Use ESP32_REV_MIN_FULL instead.
int
default 0 if ESP32_REV_MIN_0
default 1 if ESP32_REV_MIN_1
default 1 if ESP32_REV_MIN_1 || ESP32_REV_MIN_1_1
default 2 if ESP32_REV_MIN_2
default 3 if ESP32_REV_MIN_3
default 3 if ESP32_REV_MIN_3 || ESP32_REV_MIN_3_1
config ESP32_REV_MIN_FULL
int
default 0 if ESP32_REV_MIN_0
default 100 if ESP32_REV_MIN_1
default 101 if ESP32_REV_MIN_1_1
default 200 if ESP32_REV_MIN_2
default 300 if ESP32_REV_MIN_3
default 301 if ESP32_REV_MIN_3_1
config ESP_REV_MIN_FULL
int
default ESP32_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32 Revision (Rev v3.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32_REV_MIN_FULL to ESP32_REV_MAX_FULL
config ESP32_REV_MAX_FULL
int
default 399
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32_REV_MAX_FULL
components/esp_hw_support/port/esp32/Kconfig.rtc
+1 -1
View File
@@ -36,7 +36,7 @@ endchoice
choice RTC_EXT_CRYST_ADDIT_CURRENT_METHOD
prompt "Additional current for external 32kHz crystal"
depends on RTC_CLK_SRC_EXT_CRYS
depends on ESP32_REV_MIN <= 1
depends on ESP32_REV_MIN_FULL < 200
default RTC_EXT_CRYST_ADDIT_CURRENT_NONE
help
With some 32kHz crystal configurations, the X32N and X32P pins may not have enough
components/esp_hw_support/port/esp32/chip_info.c
+3 -1
View File
@@ -7,6 +7,7 @@
#include <string.h>
#include "esp_chip_info.h"
#include "soc/soc.h"
#include "soc/chip_revision.h"
#include "soc/efuse_reg.h"
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
@@ -42,6 +43,7 @@ void esp_chip_info(esp_chip_info_t* out_info)
#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
inline bool soc_has_cache_lock_bug(void)
{
return (efuse_hal_get_major_chip_version() == 3);
unsigned rev = efuse_hal_chip_revision();
return ESP_CHIP_REV_ABOVE(rev, 300);
}
#endif
components/esp_hw_support/port/esp32/rtc_clk.c
+5 -8
View File
@@ -12,6 +12,7 @@
#include "soc/rtc_periph.h"
#include "soc/sens_periph.h"
#include "soc/soc_caps.h"
#include "soc/chip_revision.h"
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#include "soc/gpio_struct.h"
@@ -44,9 +45,8 @@ static void rtc_clk_32k_enable_common(clk_ll_xtal32k_enable_mode_t mode)
SET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL);
#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
uint8_t chip_ver = efuse_hal_get_major_chip_version();
// version0 and version1 need provide additional current to external XTAL.
if(chip_ver == 0 || chip_ver == 1) {
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 200)) {
/* TOUCH sensor can provide additional current to external XTAL.
In some case, X32N and X32P PAD don't have enough drive capability to start XTAL */
SET_PERI_REG_MASK(RTC_IO_TOUCH_CFG_REG, RTC_IO_TOUCH_XPD_BIAS_M);
@@ -60,8 +60,7 @@ static void rtc_clk_32k_enable_common(clk_ll_xtal32k_enable_mode_t mode)
SET_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
}
#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
uint8_t chip_ver = efuse_hal_get_major_chip_version();
if(chip_ver == 0 || chip_ver == 1) {
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 200)) {
/* TOUCH sensor can provide additional current to external XTAL.
In some case, X32N and X32P PAD don't have enough drive capability to start XTAL */
SET_PERI_REG_MASK(RTC_IO_TOUCH_CFG_REG, RTC_IO_TOUCH_XPD_BIAS_M);
@@ -94,14 +93,12 @@ void rtc_clk_32k_enable(bool enable)
CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_MUX_SEL | RTC_IO_X32P_MUX_SEL);
#ifdef CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT
uint8_t chip_ver = efuse_hal_get_major_chip_version();
if(chip_ver == 0 || chip_ver == 1) {
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 200)) {
/* Power down TOUCH */
CLEAR_PERI_REG_MASK(RTC_IO_TOUCH_PAD9_REG, RTC_IO_TOUCH_PAD9_XPD_M);
}
#elif defined CONFIG_RTC_EXT_CRYST_ADDIT_CURRENT_V2
uint8_t chip_ver = efuse_hal_get_major_chip_version();
if(chip_ver == 0 || chip_ver == 1) {
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 200)) {
/* Power down TOUCH */
CLEAR_PERI_REG_MASK(RTC_IO_TOUCH_CFG_REG, RTC_IO_TOUCH_XPD_BIAS_M);
SET_PERI_REG_BITS(RTC_IO_TOUCH_CFG_REG, RTC_IO_TOUCH_DCUR, 0, RTC_IO_TOUCH_DCUR_S);
components/esp_hw_support/port/esp32c2/Kconfig.hw_support
+49
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@@ -0,0 +1,49 @@
choice ESP32C2_REV_MIN
prompt "Minimum Supported ESP32-C2 Revision"
default ESP32C2_REV_MIN_1
help
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32C2_REV_MIN_1
bool "Rev v1.0 (ECO1)"
config ESP32C2_REV_MIN_2
bool "Rev v2.0 (ECO2)"
endchoice
config ESP32C2_REV_MIN_FULL
int
default 100 if ESP32C2_REV_MIN_1
default 200 if ESP32C2_REV_MIN_2
config ESP_REV_MIN_FULL
int
default ESP32C2_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-C2 Revision (Rev v1.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32C2_REV_MIN_FULL to ESP32C2_REV_MAX_FULL
config ESP32C2_REV_MAX_FULL
int
default 199
# keep in sync the "Maximum Supported Revision" description with this value
config ESP32C2_REV2_DEVELOPMENT
bool "Develop on ESP32-C2 v2.0 (Preview)"
default y if IDF_CI_BUILD
config ESP_REV_MAX_FULL
int
default 299 if ESP32C2_REV2_DEVELOPMENT
default ESP32C2_REV_MAX_FULL if !ESP32C2_REV2_DEVELOPMENT
components/esp_hw_support/port/esp32c3/Kconfig.hw_support
+34 -8
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@@ -2,26 +2,52 @@ choice ESP32C3_REV_MIN
prompt "Minimum Supported ESP32-C3 Revision"
default ESP32C3_REV_MIN_3
help
Minimum revision that ESP-IDF would support.
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
Only supporting higher chip revisions can reduce binary size.
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32C3_REV_MIN_0
bool "Rev 0"
bool "Rev v0.0 (ECO0)"
config ESP32C3_REV_MIN_1
bool "Rev 1"
bool "Rev v0.1 (ECO1)"
config ESP32C3_REV_MIN_2
bool "Rev 2"
bool "Rev v0.2 (ECO2)"
config ESP32C3_REV_MIN_3
bool "Rev 3"
bool "Rev v0.3 (ECO3)"
config ESP32C3_REV_MIN_4
bool "Rev 4"
bool "Rev v0.4 (ECO4)"
endchoice
config ESP32C3_REV_MIN
config ESP32C3_REV_MIN_FULL
int
default 0 if ESP32C3_REV_MIN_0
default 1 if ESP32C3_REV_MIN_1
default 2 if ESP32C3_REV_MIN_2
default 3 if ESP32C3_REV_MIN_3
default 4 if ESP32C3_REV_MIN_4
config ESP_REV_MIN_FULL
int
default ESP32C3_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-C3 Revision (Rev v0.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32C3_REV_MIN_FULL to ESP32C3_REV_MAX_FULL
config ESP32C3_REV_MAX_FULL
int
default 99
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32C3_REV_MAX_FULL
components/esp_hw_support/port/esp32c3/rtc_init.c
+1 -1
View File
@@ -325,7 +325,7 @@ static void set_rtc_dig_dbias()
3. a reasonable rtc_dbias can be calculated by a certion formula.
*/
uint32_t rtc_dbias = 28, dig_dbias = 28;
uint8_t chip_version = efuse_hal_get_minor_chip_version();
unsigned chip_version = efuse_hal_chip_revision();
if (chip_version >= 3) {
dig_dbias = get_dig_dbias_by_efuse(chip_version);
if (dig_dbias != 0) {
components/esp_hw_support/port/esp32c3/rtc_sleep.c
+3 -2
View File
@@ -16,6 +16,7 @@
#include "soc/fe_reg.h"
#include "soc/timer_group_reg.h"
#include "soc/system_reg.h"
#include "soc/chip_revision.h"
#include "esp32c3/rom/ets_sys.h"
#include "esp32c3/rom/rtc.h"
#include "regi2c_ctrl.h"
@@ -76,8 +77,8 @@ void rtc_sleep_get_default_config(uint32_t sleep_flags, rtc_sleep_config_t *out_
if (sleep_flags & RTC_SLEEP_PD_DIG) {
unsigned atten_deep_sleep = RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT;
#if CONFIG_ESP32C3_REV_MIN < 3
if (efuse_hal_get_minor_chip_version() < 3) {
#if CONFIG_ESP32C3_REV_MIN_FULL < 3
if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 3)) {
atten_deep_sleep = 0; /* workaround for deep sleep issue in high temp on ECO2 and below */
}
#endif
components/esp_hw_support/port/esp32c6/Kconfig.hw_support
+30 -4
View File
@@ -2,14 +2,40 @@ choice ESP32C6_REV_MIN
prompt "Minimum Supported ESP32-C6 Revision"
default ESP32C6_REV_MIN_0
help
Minimum revision that ESP-IDF would support.
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
Only supporting higher chip revisions can reduce binary size.
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32C6_REV_MIN_0
bool "Rev 0"
bool "Rev v0.0"
endchoice
config ESP32C6_REV_MIN
config ESP32C6_REV_MIN_FULL
int
default 0 if ESP32C6_REV_MIN_0
config ESP_REV_MIN_FULL
int
default ESP32C6_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-C6 Revision (Rev v0.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32C6_REV_MIN_FULL to ESP32C6_REV_MAX_FULL
config ESP32C6_REV_MAX_FULL
int
default 99
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32C6_REV_MAX_FULL
components/esp_hw_support/port/esp32h2/Kconfig.hw_support
+41
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@@ -0,0 +1,41 @@
choice ESP32H2_REV_MIN
prompt "Minimum Supported ESP32-H2 Revision"
default ESP32H2_REV_MIN_0
help
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32H2_REV_MIN_0
bool "Rev v0.0 (ECO0)"
endchoice
config ESP32H2_REV_MIN_FULL
int
default 0 if ESP32H2_REV_MIN_0
config ESP_REV_MIN_FULL
int
default ESP32H2_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-H2 Revision (Rev v1.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32H2_REV_MIN_FULL to ESP32H2_REV_MAX_FULL
config ESP32H2_REV_MAX_FULL
int
default 199
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32H2_REV_MAX_FULL
components/esp_hw_support/port/esp32s2/Kconfig.hw_support
+44
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@@ -0,0 +1,44 @@
choice ESP32S2_REV_MIN
prompt "Minimum Supported ESP32-S2 Revision"
default ESP32S2_REV_MIN_0
help
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32S2_REV_MIN_0
bool "Rev v0.0 (ECO0)"
config ESP32S2_REV_MIN_1
bool "Rev v1.0 (ECO1)"
endchoice
config ESP32S2_REV_MIN_FULL
int
default 0 if ESP32S2_REV_MIN_0
default 100 if ESP32S2_REV_MIN_1
config ESP_REV_MIN_FULL
int
default ESP32S2_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-S2 Revision (Rev v1.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32S2_REV_MIN_FULL to ESP32S2_REV_MAX_FULL
config ESP32S2_REV_MAX_FULL
int
default 199
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32S2_REV_MAX_FULL
components/esp_hw_support/port/esp32s3/Kconfig.hw_support
+47
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@@ -0,0 +1,47 @@
choice ESP32S3_REV_MIN
prompt "Minimum Supported ESP32-S3 Revision"
default ESP32S3_REV_MIN_0
help
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32S3_REV_MIN_0
bool "Rev v0.0 (ECO0)"
config ESP32S3_REV_MIN_1
bool "Rev v0.1 (ECO1)"
config ESP32S3_REV_MIN_2
bool "Rev v0.2 (ECO2)"
endchoice
config ESP32S3_REV_MIN_FULL
int
default 0 if ESP32S3_REV_MIN_0
default 1 if ESP32S3_REV_MIN_1
default 2 if ESP32S3_REV_MIN_2
config ESP_REV_MIN_FULL
int
default ESP32S3_REV_MIN_FULL
#
# MAX Revision
#
comment "Maximum Supported ESP32-S3 Revision (Rev v0.99)"
# Maximum revision that IDF supports.
# It can not be changed by user.
# Only Espressif can change it when a new version will be supported in IDF.
# Supports all chips starting from ESP32S3_REV_MIN_FULL to ESP32S3_REV_MAX_FULL
config ESP32S3_REV_MAX_FULL
int
default 99
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32S3_REV_MAX_FULL