Merge branch 'fix/fix_usb_hs_phy_leakage_on_deepsleep_v5.4' into 'release/v5.4'

fix(esp_hw_support): Fix deepsleep leakage after initializing USB HS phy (v5.4)

See merge request espressif/esp-idf!39168

components/esp_hw_support/include/esp_private/sleep_usb.h

@@ -13,7 +13,8 @@
 extern "C" {
 #endif
 
-#if SOC_USB_OTG_SUPPORTED && SOC_PM_SUPPORT_CNNT_PD
+#if SOC_USB_OTG_SUPPORTED
+#if SOC_PM_SUPPORT_CNNT_PD
 /**
  * @brief Backup usb OTG phy bus_clock / stoppclk configuration and
  *         before light sleep to avoid current leakage
@@ -26,6 +27,16 @@ void sleep_usb_otg_phy_backup_and_disable(void);
 void sleep_usb_otg_phy_restore(void);
 #endif
 
+#if SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO
+/**
+ * @brief The DP/DM part of the UTMI PHY circuit of esp32p4 that converts logic level to digital
+ *        has no power off isolation, which will cause leakage when entering deepsleep.
+ *        This problem can be workarounded by enabling USB-OTG's HNP (Host negotiation protocol)
+ *        to enable DM pull-down to suppress leakage.
+ */
+void sleep_usb_suppress_deepsleep_leakage(void);
+#endif
+#endif
 #ifdef __cplusplus
 }
 #endif

components/esp_hw_support/sleep_usb.c

@@ -9,10 +9,13 @@
 #include "esp_private/sleep_usb.h"
 #include "esp_attr.h"
 
-#if SOC_USB_OTG_SUPPORTED && SOC_PM_SUPPORT_CNNT_PD
+#if SOC_USB_OTG_SUPPORTED && (SOC_PM_SUPPORT_CNNT_PD || SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO)
 #include "hal/usb_utmi_ll.h"
 #include "hal/usb_dwc_ll.h"
+#endif
 
+#if SOC_USB_OTG_SUPPORTED
+#if SOC_PM_SUPPORT_CNNT_PD
 static bool s_usb_utmi_bus_clock_state, s_usb_utmi_stoppclk_state;
 
 void sleep_usb_otg_phy_backup_and_disable(void)
@@ -34,3 +37,13 @@ void sleep_usb_otg_phy_restore(void)
     }
 }
 #endif
+
+#if SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO
+void sleep_usb_suppress_deepsleep_leakage(void)
+{
+    if (_usb_utmi_ll_bus_clock_is_enabled()) {
+        usb_dwc_ll_gusbcfg_en_hnp_cap(&USB_DWC_HS);
+    }
+}
+#endif
+#endif