Merge branch 'fix/esp32p4_secure_boot_sig_block' into 'master'

fix(esp32p4): secure boot (ECDSA-P384) and flash encryption eFuse fixes

See merge request espressif/esp-idf!49827

components/bootloader/Kconfig.projbuild

@@ -588,6 +588,8 @@ menu "Security features"
         config SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
             bool "Using ECC curve NISTP384 (Recommended)"
             depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME && SOC_ECDSA_SUPPORT_CURVE_P384
+            # ESP32-P4 revisions < v3.0 do not support Secure Boot using ECDSA-P384
+            depends on !ESP32P4_SELECTS_REV_LESS_V3
 
     endchoice
 
@@ -1164,6 +1166,8 @@ menu "Security features"
         default y if SECURE_FLASH_ENCRYPTION_MODE_RELEASE
         default n
         depends on SECURE_FLASH_ENC_ENABLED && SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
+        # ESP32-P4 revisions < v3.0 do not support the XTS-AES pseudo rounds function
+        depends on !ESP32P4_SELECTS_REV_LESS_V3
         help
             If set (default), the bootloader will permanently enable the XTS-AES peripheral's pseudo rounds function.
             Note: Enabling this config would burn an efuse.

components/bootloader_support/src/esp32p4/flash_encryption_secure_features.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,6 +16,7 @@
 #include "hal/key_mgr_hal.h"
 #include "hal/key_mgr_ll.h"
 #include "hal/mspi_ll.h"
+#include "hal/spi_flash_encrypted_ll.h"
 
 ESP_LOG_ATTR_TAG(TAG, "flash_encrypt");
 
@@ -45,6 +46,14 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
 
     esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
 
+#if CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC
+    if (spi_flash_encrypt_ll_is_pseudo_rounds_function_supported()) {
+        ESP_LOGI(TAG, "Enable XTS-AES pseudo rounds function...");
+        uint8_t xts_pseudo_level = CONFIG_SECURE_FLASH_PSEUDO_ROUND_FUNC_STRENGTH;
+        esp_efuse_write_field_blob(ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL, &xts_pseudo_level, ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[0]->bit_count);
+    }
+#endif
+
 #if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
     // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot
     // otherwise the Flash Encryption key cannot be read protected

components/bootloader_support/src/esp32p4/secure_boot_secure_features.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -48,6 +48,10 @@ esp_err_t esp_secure_boot_enable_secure_features(void)
     esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE);
 #endif
 
+#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
+    esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_SHA384_EN);
+#endif
+
     esp_efuse_write_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
 
 #ifndef CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS

components/esp_rom/esp32p4/include/esp32p4/rom/secure_boot.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -88,6 +88,25 @@ struct ets_secure_boot_sig_block {
 
 #elif CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
 
+#if CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS
+struct __attribute((packed)) ets_secure_boot_sig_block {
+    uint8_t magic_byte;
+    uint8_t version;
+    uint8_t sha_version;
+    uint8_t _reserved2;
+    uint8_t image_digest[48];
+    struct {
+        struct {
+            uint8_t curve_id; /* ETS_ECDSA_CURVE_P192 / ETS_ECDSA_CURVE_P256 / ETS_ECDSA_CURVE_P384 */
+            uint8_t point[96]; /* X followed by Y (both little-endian), plus zero bytes if P192 */
+        } key;
+        uint8_t signature[96]; /* r followed by s (both little-endian) */
+        uint8_t padding[951];
+    } ecdsa;
+    uint32_t block_crc; /* note: crc covers all bytes in the structure before it, regardless of version field */
+    uint8_t _padding[16];
+};
+#else
 struct __attribute((packed)) ets_secure_boot_sig_block {
     uint8_t magic_byte;
     uint8_t version;
@@ -105,6 +124,7 @@ struct __attribute((packed)) ets_secure_boot_sig_block {
     uint32_t block_crc; /* note: crc covers all bytes in the structure before it, regardless of version field */
     uint8_t _padding[16];
 };
+#endif /* CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_384_BITS */
 #endif
 
 ESP_STATIC_ASSERT(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");